hps2fpga_scr Address Map

SOC2FPGA Security Control Registers (SCR)
Module Instance Base Address End Address
noc_fw_soc2fpga__ocp_slv__10d21200__soc2fpga_scr 0x10D21200 0x10D212FF
Register Offset Width Access Reset Value Description
soc2fpga 0x0 32 RW 0x00000000
Per-Master Security bit for SOC2FPGA