Rsgi0 Summary

Contains registers with the GICR0 prefix.

Base Address: 0x1D070000

Register

Address Offset

Bit Fields
i_aps_gic__gic_axi4_slave__1d000000__GICRsgi0

GICR0_IGROUPR0

0x128

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

group_status_bit31

RW 0x0

group_status_bit30

RW 0x0

group_status_bit29

RW 0x0

group_status_bit28

RW 0x0

group_status_bit27

RW 0x0

group_status_bit26

RW 0x0

group_status_bit25

RW 0x0

group_status_bit24

RW 0x0

group_status_bit23

RW 0x0

group_status_bit22

RW 0x0

group_status_bit21

RW 0x0

group_status_bit20

RW 0x0

group_status_bit19

RW 0x0

group_status_bit18

RW 0x0

group_status_bit17

RW 0x0

group_status_bit16

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

group_status_bit15

RW 0x0

group_status_bit14

RW 0x0

group_status_bit13

RW 0x0

group_status_bit12

RW 0x0

group_status_bit11

RW 0x0

group_status_bit10

RW 0x0

group_status_bit9

RW 0x0

group_status_bit8

RW 0x0

group_status_bit7

RW 0x0

group_status_bit6

RW 0x0

group_status_bit5

RW 0x0

group_status_bit4

RW 0x0

group_status_bit3

RW 0x0

group_status_bit2

RW 0x0

group_status_bit1

RW 0x0

group_status_bit0

RW 0x0

GICR0_ISENABLER0

0x256

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

set_enable_bit31

RW 0x0

set_enable_bit30

RW 0x0

set_enable_bit29

RW 0x0

set_enable_bit28

RW 0x0

set_enable_bit27

RW 0x0

set_enable_bit26

RW 0x0

set_enable_bit25

RW 0x0

set_enable_bit24

RW 0x0

set_enable_bit23

RW 0x0

set_enable_bit22

RW 0x0

set_enable_bit21

RW 0x0

set_enable_bit20

RW 0x0

set_enable_bit19

RW 0x0

set_enable_bit18

RW 0x0

set_enable_bit17

RW 0x0

set_enable_bit16

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

set_enable_bit15

RW 0x0

set_enable_bit14

RW 0x0

set_enable_bit13

RW 0x0

set_enable_bit12

RW 0x0

set_enable_bit11

RW 0x0

set_enable_bit10

RW 0x0

set_enable_bit9

RW 0x0

set_enable_bit8

RW 0x0

set_enable_bit7

RW 0x0

set_enable_bit6

RW 0x0

set_enable_bit5

RW 0x0

set_enable_bit4

RW 0x0

set_enable_bit3

RW 0x0

set_enable_bit2

RW 0x0

set_enable_bit1

RW 0x0

set_enable_bit0

RW 0x0

GICR0_ICENABLER0

0x384

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

clear_enable_bit31

RW 0x0

clear_enable_bit30

RW 0x0

clear_enable_bit29

RW 0x0

clear_enable_bit28

RW 0x0

clear_enable_bit27

RW 0x0

clear_enable_bit26

RW 0x0

clear_enable_bit25

RW 0x0

clear_enable_bit24

RW 0x0

clear_enable_bit23

RW 0x0

clear_enable_bit22

RW 0x0

clear_enable_bit21

RW 0x0

clear_enable_bit20

RW 0x0

clear_enable_bit19

RW 0x0

clear_enable_bit18

RW 0x0

clear_enable_bit17

RW 0x0

clear_enable_bit16

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

clear_enable_bit15

RW 0x0

clear_enable_bit14

RW 0x0

clear_enable_bit13

RW 0x0

clear_enable_bit12

RW 0x0

clear_enable_bit11

RW 0x0

clear_enable_bit10

RW 0x0

clear_enable_bit9

RW 0x0

clear_enable_bit8

RW 0x0

clear_enable_bit7

RW 0x0

clear_enable_bit6

RW 0x0

clear_enable_bit5

RW 0x0

clear_enable_bit4

RW 0x0

clear_enable_bit3

RW 0x0

clear_enable_bit2

RW 0x0

clear_enable_bit1

RW 0x0

clear_enable_bit0

RW 0x0

GICR0_ISPENDR0

0x512

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

set_pending_bit31

RW 0x0

set_pending_bit30

RW 0x0

set_pending_bit29

RW 0x0

set_pending_bit28

RW 0x0

set_pending_bit27

RW 0x0

set_pending_bit26

RW 0x0

set_pending_bit25

RW 0x0

set_pending_bit24

RW 0x0

set_pending_bit23

RW 0x0

set_pending_bit22

RW 0x0

set_pending_bit21

RW 0x0

set_pending_bit20

RW 0x0

set_pending_bit19

RW 0x0

set_pending_bit18

RW 0x0

set_pending_bit17

RW 0x0

set_pending_bit16

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

set_pending_bit15

RW 0x0

set_pending_bit14

RW 0x0

set_pending_bit13

RW 0x0

set_pending_bit12

RW 0x0

set_pending_bit11

RW 0x0

set_pending_bit10

RW 0x0

set_pending_bit9

RW 0x0

set_pending_bit8

RW 0x0

set_pending_bit7

RW 0x0

set_pending_bit6

RW 0x0

set_pending_bit5

RW 0x0

set_pending_bit4

RW 0x0

set_pending_bit3

RW 0x0

set_pending_bit2

RW 0x0

set_pending_bit1

RW 0x0

set_pending_bit0

RW 0x0

GICR0_ICPENDR0

0x640

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

clear_pending_bit31

RW 0x0

clear_pending_bit30

RW 0x0

clear_pending_bit29

RW 0x0

clear_pending_bit28

RW 0x0

clear_pending_bit27

RW 0x0

clear_pending_bit26

RW 0x0

clear_pending_bit25

RW 0x0

clear_pending_bit24

RW 0x0

clear_pending_bit23

RW 0x0

clear_pending_bit22

RW 0x0

clear_pending_bit21

RW 0x0

clear_pending_bit20

RW 0x0

clear_pending_bit19

RW 0x0

clear_pending_bit18

RW 0x0

clear_pending_bit17

RW 0x0

clear_pending_bit16

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

clear_pending_bit15

RW 0x0

clear_pending_bit14

RW 0x0

clear_pending_bit13

RW 0x0

clear_pending_bit12

RW 0x0

clear_pending_bit11

RW 0x0

clear_pending_bit10

RW 0x0

clear_pending_bit9

RW 0x0

clear_pending_bit8

RW 0x0

clear_pending_bit7

RW 0x0

clear_pending_bit6

RW 0x0

clear_pending_bit5

RW 0x0

clear_pending_bit4

RW 0x0

clear_pending_bit3

RW 0x0

clear_pending_bit2

RW 0x0

clear_pending_bit1

RW 0x0

clear_pending_bit0

RW 0x0

GICR0_ISACTIVER0

0x768

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

set_active_bit31

RW 0x0

set_active_bit30

RW 0x0

set_active_bit29

RW 0x0

set_active_bit28

RW 0x0

set_active_bit27

RW 0x0

set_active_bit26

RW 0x0

set_active_bit25

RW 0x0

set_active_bit24

RW 0x0

set_active_bit23

RW 0x0

set_active_bit22

RW 0x0

set_active_bit21

RW 0x0

set_active_bit20

RW 0x0

set_active_bit19

RW 0x0

set_active_bit18

RW 0x0

set_active_bit17

RW 0x0

set_active_bit16

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

set_active_bit15

RW 0x0

set_active_bit14

RW 0x0

set_active_bit13

RW 0x0

set_active_bit12

RW 0x0

set_active_bit11

RW 0x0

set_active_bit10

RW 0x0

set_active_bit9

RW 0x0

set_active_bit8

RW 0x0

set_active_bit7

RW 0x0

set_active_bit6

RW 0x0

set_active_bit5

RW 0x0

set_active_bit4

RW 0x0

set_active_bit3

RW 0x0

set_active_bit2

RW 0x0

set_active_bit1

RW 0x0

set_active_bit0

RW 0x0

GICR0_ICACTIVER0

0x896

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

clear_active_bit31

RW 0x0

clear_active_bit30

RW 0x0

clear_active_bit29

RW 0x0

clear_active_bit28

RW 0x0

clear_active_bit27

RW 0x0

clear_active_bit26

RW 0x0

clear_active_bit25

RW 0x0

clear_active_bit24

RW 0x0

clear_active_bit23

RW 0x0

clear_active_bit22

RW 0x0

clear_active_bit21

RW 0x0

clear_active_bit20

RW 0x0

clear_active_bit19

RW 0x0

clear_active_bit18

RW 0x0

clear_active_bit17

RW 0x0

clear_active_bit16

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

clear_active_bit15

RW 0x0

clear_active_bit14

RW 0x0

clear_active_bit13

RW 0x0

clear_active_bit12

RW 0x0

clear_active_bit11

RW 0x0

clear_active_bit10

RW 0x0

clear_active_bit9

RW 0x0

clear_active_bit8

RW 0x0

clear_active_bit7

RW 0x0

clear_active_bit6

RW 0x0

clear_active_bit5

RW 0x0

clear_active_bit4

RW 0x0

clear_active_bit3

RW 0x0

clear_active_bit2

RW 0x0

clear_active_bit1

RW 0x0

clear_active_bit0

RW 0x0

GICR0_IPRIORITYR0

0x1024

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

offset3

RW 0x0

offset2

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

offset1

RW 0x0

offset0

RW 0x0

GICR0_IPRIORITYR1

0x1028

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

offset3

RW 0x0

offset2

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

offset1

RW 0x0

offset0

RW 0x0

GICR0_IPRIORITYR2

0x1032

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

offset3

RW 0x0

offset2

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

offset1

RW 0x0

offset0

RW 0x0

GICR0_IPRIORITYR3

0x1036

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

offset3

RW 0x0

offset2

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

offset1

RW 0x0

offset0

RW 0x0

GICR0_IPRIORITYR4

0x1040

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

offset3

RW 0x0

offset2

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

offset1

RW 0x0

offset0

RW 0x0

GICR0_IPRIORITYR5

0x1044

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

offset3

RW 0x0

offset2

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

offset1

RW 0x0

offset0

RW 0x0

GICR0_IPRIORITYR6

0x1048

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

offset3

RW 0x0

offset2

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

offset1

RW 0x0

offset0

RW 0x0

GICR0_IPRIORITYR7

0x1052

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

offset3

RW 0x0

offset2

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

offset1

RW 0x0

offset0

RW 0x0

GICR0_ICFGR0

0x3072

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

int_config15

RO 0x2

int_config14

RO 0x2

int_config13

RO 0x2

int_config12

RO 0x2

int_config11

RO 0x2

int_config10

RO 0x2

int_config9

RO 0x2

int_config8

RO 0x2

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

int_config7

RO 0x2

int_config6

RO 0x2

int_config5

RO 0x2

int_config4

RO 0x2

int_config3

RO 0x2

int_config2

RO 0x2

int_config1

RO 0x2

int_config0

RO 0x2

GICR0_ICFGR1

0x3076

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

int_config15

RW 0x0

int_config14

RW 0x0

int_config13

RW 0x0

int_config12

RW 0x0

int_config11

RW 0x0

int_config10

RW 0x0

int_config9

RW 0x0

int_config8

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

int_config7

RW 0x0

int_config6

RW 0x0

int_config5

RW 0x0

int_config4

RW 0x0

int_config3

RW 0x0

int_config2

RW 0x0

int_config1

RW 0x0

int_config0

RW 0x0

GICR0_IGRPMODR0

0x3328

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

group_modifier_bit31

RW 0x0

group_modifier_bit30

RW 0x0

group_modifier_bit29

RW 0x0

group_modifier_bit28

RW 0x0

group_modifier_bit27

RW 0x0

group_modifier_bit26

RW 0x0

group_modifier_bit25

RW 0x0

group_modifier_bit24

RW 0x0

group_modifier_bit23

RW 0x0

group_modifier_bit22

RW 0x0

group_modifier_bit21

RW 0x0

group_modifier_bit20

RW 0x0

group_modifier_bit19

RW 0x0

group_modifier_bit18

RW 0x0

group_modifier_bit17

RW 0x0

group_modifier_bit16

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

group_modifier_bit15

RW 0x0

group_modifier_bit14

RW 0x0

group_modifier_bit13

RW 0x0

group_modifier_bit12

RW 0x0

group_modifier_bit11

RW 0x0

group_modifier_bit10

RW 0x0

group_modifier_bit9

RW 0x0

group_modifier_bit8

RW 0x0

group_modifier_bit7

RW 0x0

group_modifier_bit6

RW 0x0

group_modifier_bit5

RW 0x0

group_modifier_bit4

RW 0x0

group_modifier_bit3

RW 0x0

group_modifier_bit2

RW 0x0

group_modifier_bit1

RW 0x0

group_modifier_bit0

RW 0x0

GICR0_NSACR

0x3584

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

ns_access15

RW 0x0

ns_access14

RW 0x0

ns_access13

RW 0x0

ns_access12

RW 0x0

ns_access11

RW 0x0

ns_access10

RW 0x0

ns_access9

RW 0x0

ns_access8

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

ns_access7

RW 0x0

ns_access6

RW 0x0

ns_access5

RW 0x0

ns_access4

RW 0x0

ns_access3

RW 0x0

ns_access2

RW 0x0

ns_access1

RW 0x0

ns_access0

RW 0x0

GICR0_MISCSTATUSR

0x49152

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

cpu_active

RO 0x0

wake_request

RO 0x0

RESERVED1

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RESERVED1

RO 0x0

access_type

RO 0x0

RESERVED0

RO 0x0

EnableGrp1_s

RO 0x0

EnableGrp1_ns

RO 0x0

EnableGrp0

RO 0x0

GICR0_IERRVR

0x49160

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

valid_bit31

RO 0x0

valid_bit30

RO 0x0

valid_bit29

RO 0x0

valid_bit28

RO 0x0

valid_bit27

RO 0x0

valid_bit26

RO 0x0

valid_bit25

RO 0x0

valid_bit24

RO 0x0

valid_bit23

RO 0x0

valid_bit22

RO 0x0

valid_bit21

RO 0x0

valid_bit20

RO 0x0

valid_bit19

RO 0x0

valid_bit18

RO 0x0

valid_bit17

RO 0x0

valid_bit16

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

valid_bit15

RO 0x0

valid_bit14

RO 0x0

valid_bit13

RO 0x0

valid_bit12

RO 0x0

valid_bit11

RO 0x0

valid_bit10

RO 0x0

valid_bit9

RO 0x0

valid_bit8

RO 0x0

valid_bit7

RO 0x0

valid_bit6

RO 0x0

valid_bit5

RO 0x0

valid_bit4

RO 0x0

valid_bit3

RO 0x0

valid_bit2

RO 0x0

valid_bit1

RO 0x0

valid_bit0

RO 0x0

GICR0_SGIDR

0x49168

64-bit

63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48

RESERVED16

RW 0x0

grpmod15

RW 0x0

grp15

RW 0x0

nsacr15

RW 0x0

RESERVED15

RW 0x0

grpmod14

RW 0x0

grp14

RW 0x0

nsacr14

RW 0x0

RESERVED13

RW 0x0

grpmod13

RW 0x0

grp13

RW 0x0

nsacr13

RW 0x0

RESERVED12

RW 0x0

grpmod12

RW 0x0

grp12

RW 0x0

nsacr12

RW 0x0

47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32

RESERVED11

RW 0x0

grpmod11

RW 0x0

grp11

RW 0x0

nsacr11

RW 0x0

RESERVED10

RW 0x0

grpmod10

RW 0x0

grp10

RW 0x0

nsacr10

RW 0x0

RESERVED9

RW 0x0

grpmod9

RW 0x0

grp9

RW 0x0

nsacr9

RW 0x0

RESERVED8

RW 0x0

grpmod8

RW 0x0

grp8

RW 0x0

nsacr8

RW 0x0

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RESERVED7

RW 0x0

grpmod7

RW 0x0

grp7

RW 0x0

nsacr7

RW 0x0

RESERVED6

RW 0x0

grpmod6

RW 0x0

grp6

RW 0x0

nsacr6

RW 0x0

RESERVED5

RW 0x0

grpmod5

RW 0x0

grp5

RW 0x0

nsacr5

RW 0x0

RESERVED4

RW 0x0

grpmod4

RW 0x0

grp4

RW 0x0

nsacr4

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RESERVED3

RW 0x0

grpmod3

RW 0x0

grp3

RW 0x0

nsacr3

RW 0x0

RESERVED2

RW 0x0

grpmod2

RW 0x0

grp2

RW 0x0

nsacr2

RW 0x0

RESERVED1

RW 0x0

grpmod1

RW 0x0

grp1

RW 0x0

nsacr1

RW 0x0

RESERVED0

RW 0x0

grpmod0

RW 0x0

grp0

RW 0x0

nsacr0

RW 0x0

GICR0_CFGID0

0x61440

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Af3width

RO 0x0

Af2width

RO 0x0

Af1width

RO 0x2

Af0width

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

TargetlistWidth

RO 0x0

ECCSupport

RO 0x1

RESERVED0

RO 0x0

PPINumber

RO 0x0

GICR0_CFGID1

0x61444

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

Version

RO 0xA

REVAND

RO 0x0

RESERVED1

RO 0x0

PPIsPerProcessor

RO 0xF

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RESERVED0

RO 0x0

DirectUpstream

RO 0x1

NumCPUs

RO 0x4

NumARE0CPUs

RO 0x0