DDR_CCU_dmi0_SCR Summary

DDR Security Control Registers (SCR)

Base Address: 0x18000800


Register Address Offset	Bit Fields
`soc_noc_fw_ddr_ccu_dmi0_inst_0__fw_ddr_mpu__18000800__ddr_scr__DDR_SCR`
`enable` `0x0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_16` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`nonmpuregion7enable` `RW 0x0`	`nonmpuregion6enable` `RW 0x0`	`nonmpuregion5enable` `RW 0x0`	`nonmpuregion4enable` `RW 0x0`	`nonmpuregion3enable` `RW 0x0`	`nonmpuregion2enable` `RW 0x0`	`nonmpuregion1enable` `RW 0x0`	`nonmpuregion0enable` `RW 0x0`	`mpuregion7enable` `RW 0x0`	`mpuregion6enable` `RW 0x0`	`mpuregion5enable` `RW 0x0`	`mpuregion4enable` `RW 0x0`	`mpuregion3enable` `RW 0x0`	`mpuregion2enable` `RW 0x0`	`mpuregion1enable` `RW 0x0`	`mpuregion0enable` `RW 0x0`
`enable_set` `0x4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_16` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`nonmpuregion7enable` `RW 0x0`	`nonmpuregion6enable` `RW 0x0`	`nonmpuregion5enable` `RW 0x0`	`nonmpuregion4enable` `RW 0x0`	`nonmpuregion3enable` `RW 0x0`	`nonmpuregion2enable` `RW 0x0`	`nonmpuregion1enable` `RW 0x0`	`nonmpuregion0enable` `RW 0x0`	`mpuregion7enable` `RW 0x0`	`mpuregion6enable` `RW 0x0`	`mpuregion5enable` `RW 0x0`	`mpuregion4enable` `RW 0x0`	`mpuregion3enable` `RW 0x0`	`mpuregion2enable` `RW 0x0`	`mpuregion1enable` `RW 0x0`	`mpuregion0enable` `RW 0x0`
`enable_clear` `0x8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_16` `WO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`nonmpuregion7enable` `RW 0x0`	`nonmpuregion6enable` `RW 0x0`	`nonmpuregion5enable` `RW 0x0`	`nonmpuregion4enable` `RW 0x0`	`nonmpuregion3enable` `RW 0x0`	`nonmpuregion2enable` `RW 0x0`	`nonmpuregion1enable` `RW 0x0`	`nonmpuregion0enable` `RW 0x0`	`mpuregion7enable` `RW 0x0`	`mpuregion6enable` `RW 0x0`	`mpuregion5enable` `RW 0x0`	`mpuregion4enable` `RW 0x0`	`mpuregion3enable` `RW 0x0`	`mpuregion2enable` `RW 0x0`	`mpuregion1enable` `RW 0x0`	`mpuregion0enable` `RW 0x0`
`mpuregion0addr_base` `0x16` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`high` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`low` `RO 0x0`
`mpuregion0addr_baseext` `0x20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_1` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved_1` `RO 0x0`								`low` `RW 0x0`
`mpuregion0addr_limit` `0x24` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`high` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`low` `RO 0xFFFF`
`mpuregion0addr_limitext` `0x28` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_1` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved_1` `RO 0x0`								`low` `RW 0x0`
`mpuregion1addr_base` `0x32` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`high` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`low` `RO 0x0`
`mpuregion1addr_baseext` `0x36` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_1` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved_1` `RO 0x0`								`low` `RW 0x0`
`mpuregion1addr_limit` `0x40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`high` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`low` `RO 0xFFFF`
`mpuregion1addr_limitext` `0x44` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_1` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved_1` `RO 0x0`								`low` `RW 0x0`
`mpuregion2addr_base` `0x48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`high` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`low` `RO 0x0`
`mpuregion2addr_baseext` `0x52` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_1` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved_1` `RO 0x0`								`low` `RW 0x0`
`mpuregion2addr_limit` `0x56` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`high` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`low` `RO 0xFFFF`
`mpuregion2addr_limitext` `0x60` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_1` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved_1` `RO 0x0`								`low` `RW 0x0`
`mpuregion3addr_base` `0x64` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`high` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`low` `RO 0x0`
`mpuregion3addr_baseext` `0x68` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_1` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved_1` `RO 0x0`								`low` `RW 0x0`
`mpuregion3addr_limit` `0x72` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`high` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`low` `RO 0xFFFF`
`mpuregion3addr_limitext` `0x76` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_1` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved_1` `RO 0x0`								`low` `RW 0x0`
`mpuregion4addr_base` `0x80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`high` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`low` `RO 0x0`
`mpuregion4addr_baseext` `0x84` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_1` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved_1` `RO 0x0`								`low` `RW 0x0`
`mpuregion4addr_limit` `0x88` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`high` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`low` `RO 0xFFFF`
`mpuregion4addr_limitext` `0x92` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_1` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved_1` `RO 0x0`								`low` `RW 0x0`
`mpuregion5addr_base` `0x96` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`high` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`low` `RO 0x0`
`mpuregion5addr_baseext` `0x100` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_1` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved_1` `RO 0x0`								`low` `RW 0x0`
`mpuregion5addr_limit` `0x104` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`high` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`low` `RO 0xFFFF`
`mpuregion5addr_limitext` `0x108` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_1` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved_1` `RO 0x0`								`low` `RW 0x0`
`mpuregion6addr_base` `0x112` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`high` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`low` `RO 0x0`
`mpuregion6addr_baseext` `0x116` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_1` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved_1` `RO 0x0`								`low` `RW 0x0`
`mpuregion6addr_limit` `0x120` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`high` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`low` `RO 0xFFFF`
`mpuregion6addr_limitext` `0x124` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_1` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved_1` `RO 0x0`								`low` `RW 0x0`
`mpuregion7addr_base` `0x128` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`high` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`low` `RO 0x0`
`mpuregion7addr_baseext` `0x132` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_1` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved_1` `RO 0x0`								`low` `RW 0x0`
`mpuregion7addr_limit` `0x136` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`high` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`low` `RO 0xFFFF`
`mpuregion7addr_limitext` `0x140` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_1` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved_1` `RO 0x0`								`low` `RW 0x0`
`nonmpuregion0addr_base` `0x144` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`high` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`low` `RO 0x0`
`nonmpuregion0addr_baseext` `0x148` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_1` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved_1` `RO 0x0`								`low` `RW 0x0`
`nonmpuregion0addr_limit` `0x152` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`high` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`low` `RO 0xFFFF`
`nonmpuregion0addr_limitext` `0x156` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_1` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved_1` `RO 0x0`								`low` `RW 0x0`
`nonmpuregion1addr_base` `0x160` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`high` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`low` `RO 0x0`
`nonmpuregion1addr_baseext` `0x164` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_1` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved_1` `RO 0x0`								`low` `RW 0x0`
`nonmpuregion1addr_limit` `0x168` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`high` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`low` `RO 0xFFFF`
`nonmpuregion1addr_limitext` `0x172` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_1` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved_1` `RO 0x0`								`low` `RW 0x0`
`nonmpuregion2addr_base` `0x176` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`high` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`low` `RO 0x0`
`nonmpuregion2addr_baseext` `0x180` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_1` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved_1` `RO 0x0`								`low` `RW 0x0`
`nonmpuregion2addr_limit` `0x184` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`high` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`low` `RO 0xFFFF`
`nonmpuregion2addr_limitext` `0x188` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_1` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved_1` `RO 0x0`								`low` `RW 0x0`
`nonmpuregion3addr_base` `0x192` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`high` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`low` `RO 0x0`
`nonmpuregion3addr_baseext` `0x196` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_1` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved_1` `RO 0x0`								`low` `RW 0x0`
`nonmpuregion3addr_limit` `0x200` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`high` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`low` `RO 0xFFFF`
`nonmpuregion3addr_limitext` `0x204` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_1` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved_1` `RO 0x0`								`low` `RW 0x0`
`nonmpuregion4addr_base` `0x208` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`high` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`low` `RO 0x0`
`nonmpuregion4addr_baseext` `0x212` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_1` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved_1` `RO 0x0`								`low` `RW 0x0`
`nonmpuregion4addr_limit` `0x216` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`high` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`low` `RO 0xFFFF`
`nonmpuregion4addr_limitext` `0x220` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_1` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved_1` `RO 0x0`								`low` `RW 0x0`
`nonmpuregion5addr_base` `0x224` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`high` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`low` `RO 0x0`
`nonmpuregion5addr_baseext` `0x228` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_1` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved_1` `RO 0x0`								`low` `RW 0x0`
`nonmpuregion5addr_limit` `0x232` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`high` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`low` `RO 0xFFFF`
`nonmpuregion5addr_limitext` `0x236` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_1` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved_1` `RO 0x0`								`low` `RW 0x0`
`nonmpuregion6addr_base` `0x240` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`high` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`low` `RO 0x0`
`nonmpuregion6addr_baseext` `0x244` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_1` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved_1` `RO 0x0`								`low` `RW 0x0`
`nonmpuregion6addr_limit` `0x248` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`high` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`low` `RO 0xFFFF`
`nonmpuregion6addr_limitext` `0x252` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_1` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved_1` `RO 0x0`								`low` `RW 0x0`
`nonmpuregion7addr_base` `0x256` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`high` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`low` `RO 0x0`
`nonmpuregion7addr_baseext` `0x260` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_1` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved_1` `RO 0x0`								`low` `RW 0x0`
`nonmpuregion7addr_limit` `0x264` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`high` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`low` `RO 0xFFFF`
`nonmpuregion7addr_limitext` `0x268` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved_1` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved_1` `RO 0x0`								`low` `RW 0x0`