CSIDR
Coherent Subsystem Identification Register
| Module Instance | Base Address | Register Address |
|---|---|---|
| CCU_SYSTEM | 0xF70FF000 | 0xF70FFFFC |
Size: 32
Offset: 0xFFC
Access: RO
Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
| Bit Fields | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
|
rsvd2 RO 0x0 |
NumSfs RO 0x0 |
rsvd1 RO 0x0 |
|||||||||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|
rsvd1 RO 0x0 |
DirClOffset RO 0x1 |
RelVer RO 0xA |
|||||||||||||
CSIDR Fields
| Bit | Name | Description | Access | Reset |
|---|---|---|---|---|
| 31:23 | rsvd2 |
Reserved (RAZ/WI) |
RO | 0x0 |
| 22:18 | NumSfs |
Number of Snoop Filters (-1) |
RO | 0x0 |
| 17:11 | rsvd1 |
Reserved (RAZ/WI) |
RO | 0x0 |
| 10:8 | DirClOffset |
Directory Cache Line Offset (-5) |
RO | 0x1 |
| 7:0 | RelVer |
Release Version |
RO | 0xA |