MPR_5BEAT1

         MPR register [191:160] for first beat
      
Module Instance Base Address Register Address
soc_hmc_adp_csr_inst_0_ocp_slv_block 0xF8011000 0xF8011024

Size: 32

Offset: 0x24

Access: RO

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.
Bit Fields
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

MPR160

0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

MPR160

0x0

MPR_5BEAT1 Fields

Bit Name Description Access Reset
31:0 MPR160
MPR reg[191:160] for first beat
RO 0x0