WDT_COMP_PARAM_1

         Component Parameters Register 1

Module Instance	Base Address	Register Address
`i_watchdog_0_wdt_address_block`	`0xFFD00200`	`0xFFD002F4`
`i_watchdog_1_wdt_address_block`	`0xFFD00300`	`0xFFD003F4`
`i_watchdog_2_wdt_address_block`	`0xFFD00400`	`0xFFD004F4`
`i_watchdog_3_wdt_address_block`	`0xFFD00500`	`0xFFD005F4`

Size: 32

Offset: 0xF4

Access: RO

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.

Bit Fields
31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
`RSVD_31_29` `RO 0x0`			`WDT_CNT_WIDTH` `RO 0x10`					`WDT_DFLT_TOP_INIT` `RO 0xF`				`WDT_DFLT_TOP` `RO 0xF`
15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
`RSVD_15_13` `RO 0x0`			`WDT_DFLT_RPL` `RO 0x4`			`APB_DATA_WIDTH` `RO 0x2`		`WDT_PAUSE` `RO 0x0`	`WDT_USE_FIX_TOP` `RO 0x1`	`WDT_HC_TOP` `RO 0x0`	`WDT_HC_RPL` `RO 0x0`	`WDT_HC_RMOD` `RO 0x0`	`WDT_DUAL_TOP` `RO 0x1`	`WDT_DFLT_RMOD` `RO 0x0`	`WDT_ALWAYS_EN` `RO 0x0`

WDT_COMP_PARAM_1 Fields

Bit

Name

Description

Access

Reset