IDF and ISDF Demo Videos

Intel SoC FPGA-Based Open-Source Drone Platform and Sensing Modules

This demo showcases the Aerotenna μ series microwave radars based on Intel Altera® SoC technology, the first radars for commercial and consumer drones to utilize microwave sensing, which was previously used only on military Unmanned Aerial Vehicles (UAVs). μLanding is the first and most compact microwave altimeter for drones and small UAVs, while μSharp is the first 360° active sense-and-avoid radar for drones and small UAVs.

CNN and GZIP implementation on FPGA by OpenCL

Convolutional Neural Network (CNN) is a Deep Learning algorithm used for various object classification. This AlexNet demo showcases the performance-per-watt advantage on a discrete Arria® 10 FPGA for an ImageNet scoring application. We are also showing a GZIP demonstration which compresses data at a high throughput and compression ratio. Both of these demos have been implemented in OpenCL™, which enables software programmers with limited experience in HDL. 

5G Massive MIMO Beamforming

Massive MIMO and 3D beamforming offer a significant increase in spectral efficiency. This demonstration shows how Intel® Xeon™ processors, Intel FPGAs, and a Fortville NIC can be used to build a complete 5G solution. Huge throughput and low latency is enabled with a 100 MHz carrier bandwidth, 0.2ms TTI, and 64 element antenna array. 

Smart Factory for Industry 4.0 with Deterministic Ethernet (802.1 TSN)

Last year, we have seen a rapid acceleration in the definition of new standards that are the basis of the Industry 4.0 program and the design of Smart Factory of the future. New standards such as OPC-UA Pub / Sub and TSN are growing and they are used to connect the different nodes of the factory and at the same time to assure factory interface to the Cloud.  Watch this demo to learn more.

D/AVE NX – tunable OpenGL ES 2.0/3.x and VULKAN compliant GPU for FPGAs and SoCs

This short demo shows the latest and most powerful addition to the TES D/AVE family of graphics rendering cores. It is the first IP bringing full OpenGL ES 2.0/3.1 and VULKAN graphics rendering to the FPGA and SoC world enabling fully hardware accelerated implementations of the Qt HMI framework on such devices.