At ISDF, we are assembling an array of industry experts for a day-long series of in-depth technical topics. You’ll learn more about hardware acceleration, new development tools and the wide operating system (OS) support available to get your design to market quickly.  Real application examples from Intel Programmable Solutions Group (previously Altera) partners and customers who have already tried and proven this technology will punctuate the success of the SoC FPGA system approach and move well beyond the theory to practical applications. 

Highlights of the day include:

  • ISDF San Francisco keynote from Intel CEO Brian Krzanich. Mr. Krzanich will discuss the evolution and transformation of the smart and connected world and the importance of SoC FPGAs in that world.
  • Perspectives from Intel executives and technical experts on the uses and future of SoC FPGA technology for the Internet of Things (IoT), data centers, industrial, automotive, military/aero, and communications designs.
  • In-depth technical content with hardware and software tracks with presentations from Intel and industry experts.  The emphasis will be on real-world application examples and solving common design challenges.
  • Hands-on sessions for those who want to get their hands dirty bringing up the latest Cyclone® V SoC development kit, running debug and analysis tools, interacting with the FPGA and running bare-metal code examples.

At the end of the day, you’ll walk away with an edge for getting your next design to market quickly.



The theme of this year's event is acceleration:

  • Accelerate your design - with hardware acceleration in SoC FPGAs
  • Accelerate your development process - with leading edge design tools and ecosystem support
  • Accelerate your learning - by attending ISDF 2016


Acceleration can occur at multiple levels of integration. It can occur at the system level in large systems, such as data centers, by adding FPGA acceleration boards as demonstrated by the Microsoft® Catapult project; it can occur  at the chip level by accompanying an Intel® Atom™ processor with an FPGA for accelerating video analytics in Advanced Driver Assistance Systems (ADAS); or, in a single device by offloading CPU functions to the FPGA for faster response time in drive-on-a-chip motor control systems. Wherever your system performance requirements land on this spectrum, the concept of accelerating common or time-consuming functions in an FPGA can boost your system performance while maintaining an acceptable power and cost envelope. 

New high-level design tools such as OpenCL™ and the MathWorks® Simulink® and Embedded Coder® make it easier and more powerful than ever to program these new devices using high-level languages.  The ARM® Development Studio 5 (DS-5™) Altera® Edition Toolkit and Lauterbach® debug probes make it easy to code and debug the processor cores like you are used to. 

Attending ISDF will jump start or enhance your understanding of this new SoC FPGA technology.