- Adds full programming support for Cyclone II EP2C5, EP2C8, and EP2C50 devices
- Implements software fix to address the intermittent read failure issue for Stratix II FPGA M4K memory blocks due to a software configuration error
- Implements software workaround to address the write error issue for Cyclone II FPGA M4K memory blocks when using dual ports and dual clocks
For more information regarding the M4K issue for Stratix II and Cyclone II devices, visit the Stratix II and Cyclone II FPGA M4K Notification page.
The Quartus II software version 5.0 service pack 2 includes all of the features and software fixes included in service pack 1.
- Adds full programming support for Cyclone II EP2C70 and EP2C20 devices
- Provides final timing models for Stratix II EP2S15, EP2S90, and EP2S130 devices and MAX II EPM570 and EPM2210 devices
- Includes final power models for MAX II CPLDs
- Resolves issue with SignalTap® II incremental routing errors
- Includes update to Stratix II minimum timing models used for commercial grade devices
- Includes resolution to ALTSYNCRAM megafunction functionality issue originally fixed in a critical issue patch
The Quartus II software version 5.0 service pack 2 includes all of the software fixes included in the critical issue patches released for version 5.0.
- Resolves issue with incorrect slack and clock skew values being displayed in the System Message window when a "List Path" command is performed from the Timing Analyzer report file
- Resolves issue with incorrect ALTSYNCRAM megafunction functionality for Cyclone, Cyclone II, Stratix, Stratix II, and Stratix GX device families
Important Critical Issue Notice #1 and Critical Issue Notice #2 for all Quartus II software version 5.0 users.