Intel® Quartus® Prime Standard Edition User Guide: Getting Started

ID 683475
Date 12/16/2019
Public
Document Table of Contents

1. Introduction to Intel® Quartus® Prime Standard Edition

Updated for:
Intel® Quartus® Prime Design Suite 19.4
This document is part of a collection. You can download the entire collection as a single PDF: Intel® Quartus® Prime Standard Edition User Guides - Combined PDF link

This user guide describes basic concepts and operation of the Intel® Quartus® Prime Standard Edition design software, including GUI and project structure basics, initial design planning, use of Intel FPGA IP, and migration to Intel® Quartus® Prime Pro Edition. The Intel® Quartus® Prime Standard Edition software provides a complete design environment for the following device families:

  • Intel® Arria® 10, Arria® V, and Arria® II
  • Intel® Cyclone® 10 LP, Cyclone IV, and Cyclone V
  • MAX® series

The Intel® Quartus® Prime software GUI supports easy design entry, fast design processing, straightforward device programming, and integration with other industry-standard EDA tools. The user interface makes it easy for you to focus on your design—not on the design tool. The modular Compiler streamlines the FPGA development process, and ensures the highest performance for the least effort.

Figure 1.  Intel® Quartus® Prime Standard Edition Software GUI

The Intel® Quartus® Prime Standard Edition software offers a full range of features at each phase of the design flow to shorten your design cycle and achieve the highest performance:

  • Easy Project Setup—quickly create a new project, add design files, and specify the target Intel® device with the New Project Wizard. Create different revisions of your project to compare results with different settings. Save the current state of your project and project files as a single, compressed file. Refer to Managing Intel Quartus Prime Projects for more information.
  • Design Planning Tools— plan for initial I/O pin layout, power consumption, and area utilization in the Early Power Estimator, the Power Analyzer Tool, and the Pin Planner. Refer to Design Planning for more information.
  • Design Constraint Entry—specify timing, placement, and other constraints with the Settings dialog box, Assignment Editor, Pin Planner, and Timing Analyzer. Visualize and modify logic placement within a view of the device floorplan in the Chip Planner and Timing Closure Floorplan. Refer to Intel Quartus Prime Standard Edition User Guide: Design Constraints for more information.
  • Integrated Synthesis—provides efficient synthesis support for VHDL (1987, 1993, 2008), Verilog HDL (1995, 2001), and SystemVerilog (2005) design entry languages. Refer to Intel Quartus Prime Standard Edition User Guide: Compiler for more information.
  • Incremental Compilation—preserve the results and performance for unchanged logic in your design as you make changes elsewhere, facilitating top-down or bottom-up team-based design methodologies. Refer to Intel Quartus Prime Standard Edition User Guide: Compiler for more information.
  • Optimizing Results—Design Space Explorer automatically determines the best combination of settings for your design. Design Assistant validates your project against predetermined design rules for gated clocks, reset signals, asynchronous design practices, and signal race conditions. Refer to Intel Quartus Prime Standard Edition User Guide: Design Optimization for more information.
  • Design Debugging—The Signal Tap logic analyzer captures and displays real-time signal behavior in an FPGA design, allowing to examine the behavior of internal signals during normal device operation without the need for extra I/O pins or external lab equipment. The Transceiver Toolkit provides real-time control, monitoring, and debugging of the transceiver links running on your board. Refer to Intel Quartus Prime Standard Edition User Guide: Debug Tools for more information.
  • System and IP Integration—define and generate a complete system in much less time than using traditional, manual integration methods with Platform Designer (Standard). Refer to Introduction to Intel FPGA IP Cores and Intel Quartus Prime Standard Edition User Guide: Platform Designer for more information.
  • Third-party EDA Tool Support—integrate with supported versions of third-party EDA synthesis, simulation, and board-level timing analysis tools. Refer to Third-Party Simulation and Third-Party Synthesis user guides for more information.

The Intel® Quartus® Prime Pro Edition software expands on these capabilities of the Intel® Quartus® Prime Standard Edition, and provides unique features that support the latest Intel® FPGAs. Select the Intel® Quartus® Prime software edition that provides the device support and features you require, as Selecting an Intel Quartus Prime Software Edition describes.