PCI Express DMA Reference Design Using External Memory
The PCI Express® DMA reference design using
external memory highlights the performance of the
Cyclone® V and Stratix® V Hard IP for PCI Express using the Avalon® Memory-Mapped (Avalon-MM) interface. The design includes a
high-performance DMA with an Avalon-MM interface that connects to the PCI Express Hard
IP and a DDR3 (for
Arria® V and
Stratix® V devices) or DDR4 (for
Arria® 10 devices) memory controller. It transfers
data between an external memory and host system memory. The reference design includes a
Linux and Windows based software driver that sets up the DMA transfer. You can also use
the software driver to measure and display the performance achieved for the transfers.
This reference design allows you to evaluate the performance of the Hard IP for PCI
Express using the Avalon-MM interface.
The reference design includes the following components:
Linux and Windows applications and
drivers configured specifically for this reference design.
Cyclone® V support Linux applications and drivers.
Arria® 10 and
Stratix® V support Linux as well as Windows
applications and drivers.
FPGA programming files for the Arria V,
Cyclone® V, or
V FPGA Development kits
Quartus® Prime Archive Files (. qar) for the development kits, including an SRAM Object
File (. sof) and
SignalTap® files (.stp)
An Application Layer which is
an Avalon-MM DMA example design generated in Qsys
The reference design uses the following directory structures:
The top-level module is top_hw.
top — includes all design files. If you modify the design, you must
copy the modified files into this folder before recompiling the design.