E-Tile CPRI PHY Intel FPGA IP Release Notes
1. E-Tile CPRI PHY Intel FPGA IP Release Notes
If a release note is not available for a specific IP version, the IP has no changes in that version. For information on IP update releases up to v18.1, refer to the Intel® Quartus® Prime Design Suite Update Release Notes.
IP versions are the same as the Intel® Quartus® Prime Design Suite software versions up to v19.1. From Intel® Quartus® Prime Design Suite software version 19.2 or later, IP cores have a new IP versioning scheme.
The IP versioning scheme (X.Y.Z) number changes from one software version to another. A change in:
- X indicates a major revision of the IP. If you update your Intel Quartus Prime software, you must regenerate the IP.
- Y indicates the IP includes new features. Regenerate your IP to include these new features.
- Z indicates the IP includes minor changes. Regenerate your IP to include these changes.
1.1. E-Tile CPRI PHY Intel FPGA IP v19.2.0
| Intel® Quartus® Prime Version | Description | Impact |
|---|---|---|
| 19.2 | The IP supports the
following new CPRI line rates:
|
— |
Added the following new
parameters:
|
— | |
| The IP now supports 8b/10b interface and status interface for the 8b/10b line rate. | — |
1.2. E-Tile CPRI PHY Intel FPGA IP v19.1
| Description | Impact |
|---|---|
|
Initial release for Intel® Stratix® 10 devices. |
— |
1.3. E-tile Hard IP User Guide Archives
| IP Core Version | User Guide |
|---|---|
| 19.1 | E-tile Hard IP for Ethernet Intel FPGA IP User Guide |
| 18.1.1 | E-tile Hard IP for Ethernet Intel FPGA IP User Guide |
| 18.0 | E-tile Hard IP for Ethernet Intel FPGA IP User Guide |