Intel® FPGA SDK for OpenCL™: Stratix® V Network Reference Platform Porting Guide

ID 683645
Date 11/06/2017
Public
Document Table of Contents

1. Intel® FPGA SDK for OpenCL™ Stratix® V Network Reference Platform Porting Guide

Updated for:
Intel® Quartus® Prime Design Suite 17.1

The Intel® FPGA SDK for OpenCL™ Stratix® V Network Reference Platform Porting Guide describes the procedures and design considerations you can implement to modify the Stratix® V Network Reference Platform (s5_net) into your own Custom Platform for use with the Intel® FPGA Software Development Kit (SDK) for OpenCL™ 1 2. This document also contains reference information on the design decisions for s5_net, which makes use of features such as heterogeneous memory buffers and I/O channels to maximize hardware usage on a computing card designed for networking.

1 OpenCL™ and the OpenCL logo are trademarks of Apple Inc. used by permission of the Khronos Group™.
2 The Intel® FPGA SDK for OpenCL™ is based on a published Khronos Specification, and has passed the Khronos Conformance Testing Process. Current conformance status can be found at www.khronos.org/conformance.