Moving Beyond Moore's Law—Innovating at 28 nm

Our drive to innovate has led us to examine ways to evolve our programmable technologies to meet increasing bandwidth requirements—and take you beyond the benefits possible through Moore's Law.

With our 28-nm devices, you'll find unique innovations that dramatically increase the capabilities of FPGAs:

  • Embedded HardCopy® Blocks
  • 28-Gbps embedded transceivers
  • User-friendly partial reconfiguration

Why are these new capabilities so critical now? Smartphones, cloud computing, and an array of video-related applications are driving up bandwidth demands. Bandwidth is now a key driver in the infrastructure supporting these popular applications. To be truly competitive, your systems must support not only increasingly higher bandwidth requirements but also maintain—or decrease—cost and power consumption.

Figure 1. Mobile Video Traffic Increases Bandwidth Requirements at Same Cost and Power

Simply staying on Moore's Law alone can't produce an FPGA that meets all of these challenges. Instead, we've employed creative ways to meet bandwidth demands while reducing cost and power consumption in our next-generation product portfolio.

Embedded HardCopy Blocks

Embedded HardCopy Blocks are customizable hard intellectual property (IP) blocks that leverage our unique HardCopy ASIC capabilities. These blocks harden standard or logic-intensive functions such as:

  • Application-specific functions
  • Transceiver protocols
  • Proprietary custom IP functions
Figure 2. Floorplan for an FPGA with Embedded HardCopy Blocks

This innovation substantially increases FPGA capabilities by dramatically increasing density per area. As with other hard IP, the Embedded HardCopy Blocks:

  • Simplify board design by reducing the number of components on the board.
  • Minimize cost and power consumption.
  • Enable Altera to quickly create variant products for specific market segments.

28-Gbps Embedded Transceivers

28-Gbps embedded transceivers enable breakthrough I/O bandwidth. You'll be able to maintain design functionality while reducing external components, I/O count, power, and cost. You'll also be equipped to implement next-generation designs, such as 400G systems, on a single chip, without costly external components.

Partial Reconfiguration

Building on our proven incremental compile design flow, we're bringing partial reconfiguration to life. Through this capability, you can reconfigure portions of the FPGA on the fly, while other sections are still running. This capability:

  • Reduces cost and power and saves board space by only implementing the functions needed.
  • Enables remote system enhancements without disruption.

Innovation You Can Count On

If you design an application on a 40-nm device, you can see the high levels of density, power, and transceivers required. These requirements drop substantially when you design the same application on a 28-nm FPGA with our unique innovations.

Figure 3. Comparing Density, Power, and Transceiver Count

Altera's technology leadership at 28 nm continues our tradition of innovation—and positions us to address emerging application demands. We'll have exciting product news to share with you soon.