You'll discover the 40 nm Stratix® IV FPGA family delivers density, performance, and low power. Leveraging 40 nm benefits and proven transceiver and memory interface technology, the Stratix® IV FPGA family provides an unprecedented level of system bandwidth with superior signal integrity.
Think high logic utilization and short compile times. Large FPGA designs require efficient design methodology and tool support. Intel® Quartus® Prime development software enables the highest Stratix® IV FPGA performance and productivity by incorporating the highest logic utilization and the shortest compile times in the industry.
Without compromising the performance required for compute-intensive applications, Stratix® IV DSP blocks provide low power, low cost, and small footprint programmable processing solution. Both Stratix® IV GX, Stratix® IV GT, and Stratix® IV E family variants provide a DSP- and memory-rich, highly parallel alternative to digital signal processors. Stratix® IV GX FPGAs add additional transceivers for high-speed connectivity and support for protocols such as the Serial RapidIO* standard and CPRI/OBSAI.
Intel also provides the tools necessary to implement your DSP algorithm through the use of the DSP Builder for Intel® FPGAs and Platform Designer tools, both part of the Intel Quartus® development software performance and productivity-enhancing design software that supports Stratix® IV FPGAs. With the 8.0 release of the DSP Builder for Intel FPGAs tool, Intel added a number of new Simulink blocksets (the Advanced Blockset library) that vastly improve your productivity in the synthesis of multichannel designs.
Nios® II embedded processors version extend the embedded software capabilities of Intel's 40 nm FPGAs. This allows you to add a memory management or memory protection unit to your Nios II designs for operating system support and software protection. With Nios II embedded processors, you can add dozens of 300 MIPS processors in a single high-density device. You can accelerate time-critical software subroutines automatically by converting ANSI C code into hardware accelerators with the Nios II C-to-Hardware (C2H) acceleration compiler. You can add hardware accelerators to boost system performance and/or reduce system power consumption. See what’s new in the latest release.
Faster, more robust, simpler, and lower power—Intel’s external memory solutions support high-speed external memory interfaces including DDR, DDR2, DDR3 SDRAM, RLDRAM II, QDR II, and QDR II+ SRAM on up to 24 modular I/O banks. The smart interface module is a hardened I/O module with programmable input and output delays for lane de-skew, dynamically calibrated on-chip termination (OCT), and controllable drive strength and slew rate. It offers the unique ability to swap between parallel or serial termination on-the-fly between read and write operations and saves 1.2 W power for a typical design.
Stratix® IV FPGAs are 40 nm FPGAs, making them the ideal choice for use in ASIC prototyping platforms when you are performing verification of your next ASIC or ASSP design.
The Stratix® IV FPGA family includes three device variants:
Stratix® IV FPGAs offer vertical migration within each family variant, providing the most flexibility in device selection. In addition, a vertical migration path exists between Stratix® III and Stratix® IV E devices, so you can start designing on a Stratix III device today and move to a higher density Stratix® IV E device without changing your PCB. See AN 557: Stratix® III to Stratix® IV E Cross-Family migration guidelines (PDF). Tables 1 through 3 offer an overview of the devices in the Stratix® IV FPGA family.
With 40 nm Stratix® IV FPGAs you can reach new levels of system-on-a-chip (SoC) integration. Building on the advanced, proven Stratix® III architecture, Stratix® IV FPGAs deliver a high-density, feature-rich, and high-performance core fabric. Combined with flexible I/Os, high-bandwidth transceivers, and memory interfaces, Stratix® IV FPGAs meet the requirements for high-end digital systems in wireless, wireline, military, broadcast, and other market segments.
Features supported by Stratix® III and Stratix® IV FPGAs
Think high logic utilization and short compile times. Large FPGA designs require efficient design methodology and tool support.Intel® Quartus® Prime development software enables high Stratix® IV FPGA performance and productivity by incorporating high logic utilization and the short compile times.
Intel's 40 nm solutions enable new levels of system-on-a-chip (SoC) integration and allow you to innovate products without compromise. Stratix® IV FPGAs offer unprecedented system bandwidth with 11.3 Gbps transceivers and fast DDR3 memory interfaces on a fabric that delivers high density, high performance, and low power.
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