High-Performance ALM and Interconnect

Table 1. ALM Features and Advantages

Available Resources Per ALM


8-Input fracturable LUT

    Can implement any 6-input logic function and certain 7-input functions and be fractured into independent smaller LUTs, such as two independent 4-input LUTs

    The Intel Quartus design software integrates this fracturability and optimizes it for performance, efficiency, power, and area

Two Embedded Adders

    Allows for two two-bit additions or two three-bit additions without any additional resources

    Operands can be generated from the same ALM and do not require any additional logic

Four Registers

    Optimal register-to-logic ratio to ensure device is not register-limited

    Abundance in registers for register-rich applications or pipeline designs for performance

Four Outputs

    Inputs of a single ALM can be divided between the two output functions, allowing wide input functions to run fast and narrow input functions to efficiently use remaining resources


    The core of an Intel Stratix series FPGA includes a logic array block (LAB), comprised of regular ALMs or configured as a simple, 640-bit dual-port SRAM block (known as a MLAB)

    MLABs can be configured as 64 x 10 or 32 x 20 simple dual-port SRAM blocks. The MLABs are optimized to implement filter delay lines, small FIFO buffers, and shift registers with maximum performance of 600-MHz clock speeds


Reachable Logic Elements (LEs)