Intel® eASIC™ devices are structured ASICs, an intermediary technology between FPGAs and standard-cell ASICs that provide lower unit-cost and lower power compared to FPGAs and faster time-to-market and lower non-recurring engineering cost compared to standard-cell ASICs. Upcoming devices Diamond Mesa add a hard processor system and secure device managers compatible with Intel® FPGAs to extend Intel’s logic portfolio offerings.

Intel® eASIC Diamond Mesa SoC Devices

Intel plans to incorporate a multicore, hard processor subsystem in these upcoming devices.

Intel® eASIC™ N3XS Devices

  • 28 nm process
  • Up to 52 million equivalent ASIC gates
  • Up to 124 Mb of true dual port memory
  • Up to 32 28 Gbps high speed transceivers
  • Up to 32 16.3 Gbps high speed transceivers

Intel® eASIC™ N3X and N2X Devices

  • 28 nm and 45 nm process
  • Up to 5 million equivalent logic gates
  • Up to 15.049 kbits of true dual port memory
  • Up to 18 12.5 Gbps high-speed transceivers

Intel® easicopy™ Devices

Provides a seamless and low risk migration path from Intel® eASIC™ N2X, Intel® eASIC™ N3X, Intel® eASIC™ N3XS, or Intel® eASIC Diamond Mesa SoC devices to a lower unit cost cell-based ASIC.


Lower Power and Unit Cost

Provides unit-cost and power reductions compared to FPGA by replacing SRAM configuration logic with patented single-via customization technology and disconnecting power from unused device structures.

Time Advanta

Faster time to market and turnaround time than traditional ASICs due to simplified design flow, customization of only a few mask layers, and when feasible no PCB change from base FPGA designs.

High Performance

The structured ASIC combines logic, memory, DSP, high speed memory interfaces, and high-speed transceivers (up to 28 Gbps) for high performance data plane or control plane applications.

Broad IP Support

A wealth of fully verified eASIC-ready IP cores from Intel and third party alliance partners.

Simplified Design Flow

Intel® eASIC™ device eTools offer a framework for design conversion and validation using a combination of internally developed and industry standard third party tools.

Market Applicability

Intel® eASIC™ devices offer custom low power1 2 3 4 5 6 solutions for a broad range of data intensive and IO intensive applications in end markets such as 5G wireless, military, data center acceleration, compute, storage, machine learning inference, IoT, machine vision, and video applications.


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Product and Performance Information


Software and workloads used in performance tests may have been optimized for performance only on Intel® microprocessors. Performance tests, such as SYSmark* and MobileMark*, are measured using specific computer systems, components, software, operations and functions. Any change to any of those factors may cause the results to vary. You should consult other information and performance tests to assist you in fully evaluating your contemplated purchases, including the performance of that product when combined with other products. For more complete information visit


Performance results are based on testing as of dates shown in configurations and may not reflect all publicly available security updates. See backup for configuration details. No product or component can be absolutely secure.


No product or component can be absolutely secure.


Your costs and results may vary.


Results have been estimated or simulated.


Statements in this document that refer to future plans or expectations are forward-looking statements. These statements are based on current expectations and involve many risks and uncertainties that could cause actual results to differ materially from those expressed or implied in such statements. For more information on the factors that could cause actual results to differ materially, see our most recent earnings release and SEC filings at