Features

IP Core Feature

Description

Color support

  • 8, 10, 12 or 16 bits per color (bpc)
  • RGB and YCbCr 444, 422 and 420 color modes

Symbols per clock

1, 2, 4 or 8 symbols per clock

Video

Support up to 8k

Audio

Up to 32 channels of embedded audio

Device Support

Device Family

One Symbol per Clock

Maximum Data Rate

Two Symbols per Clock

Maximum Data Rate

Four Symbols per Clock

Maximum Data Rate

Eight Symbols per Clock

Maximum Data Rate

HDMI Version

Intel® Agilex™ F-tile

Not supported

Not supported

Not supported

12,000 Mbps v.1.4, v2.0, and v2.1
Intel® Stratix® 10

Not supported

5,940 Mbps

Not supported

12,000 Mbps

v.1.4, v2.0, and v2.1

Intel® Arria® 10

Not supported

5,940 Mbps

Not supported

12,000 Mbps

v.1.4, v2.0, and v2.1

Intel® Cyclone® 10 

Not supported

5,940 Mbps

Not supported

Not supported
v1.4 and v2.0

Stratix V

2,970 Mbps

5,940 Mbps

Not supported

Not supported

v1.4 and v2.0

Arria V

1,875 Mbps

3,276.8 Mbps

5,940 Mbps

Not supported

v1.4 and v2.0

Quality Metrics

Basics

Year IP was first released

2014

Latest version of Intel® Quartus® Prime software supported?

Yes

Status

FPGA

HDMI Version

Status

A10

2.0

Production

A10

2.1

Production

S10

2.0

Production

S10

2.1

Production

C10

2.0

Production

Agilex F-tile 2.1 Preliminary

Deliverables

Customer deliverables include the following:

  • Design file (encrypted source code or post-synthesis netlist)
  • Simulation model for ModelSim*-Intel® FPGA Edition
  • Timing and/or layout constraints
  • Testbench or design example
  • Documentation with revision control
  • Readme file

 

  • Yes
  • Yes
  • Yes
  • Yes
  • Yes
  • No

Any additional customer deliverables provided with IP

None

Parameterization GUI allowing end user to configure IP

Yes

IP core is enabled for Intel FPGA IP Evaluation Mode Support

Yes

Source language

Both Verilog and VHDL

Testbench language

Both Verilog and VHDL

Software drivers provided

Verilog

Driver operating system (OS) support

N/A

Implementation

User interface

Other (Video Data)

IP-XACT metadata

No

Verification

Simulators supported

ModelSim, VCS, Riviera-PRO, NCSim (Verilog)

Hardware validated

Intel® Stratix® 10, Intel® Arria® 10, Intel® Cyclone® 10, Stratix® V, Arria® V, Agilex F-tile

Industry standard compliance testing performed

Yes

If Yes, which test(s)?

HDMI Source/Sink Compliance Test CTS 2.0b

If Yes, on which Intel FPGA device(s)?

Intel® Arria® 10, Arria V

If Yes, date performed

2017

If No, is it planned?

N/A

Interoperability

IP has undergone interoperability testing

Yes

If yes, on which Intel FPGA device(s)

Intel® Stratix® 10, Intel® Cyclone® 10, Intel® Arria® 10, Stratix V, Arria V, Agilex F-tile

Interoperability reports available

Contact Sales