Intel's FPGA Configuration Devices are the industry's easiest-to-use configuration devices:
- These devices receive regression testing with Intel's tools & intellectual property and are fully supported by technical support
- Guaranteed to work with all Intel's intellectual property (IP) blocks, such as the serial flash loader or ASMI parallel IP blocks
- Designed for maximum efficiency
- Offer in-system programmability (ISP) and reprogram capabilities not available with one-time-programmable devices
The Intel® FPGA Configuration Devices have the following advantages:
- Reliability: they typically support a minimum of 100,000 erase cycles per sector and a minimum of 20 years data retention. As a result, their management is simpler, with no need for error correction and bad block management
- Low Pin Count requirement: a quad SPI flash device typically requires six pins, but it can be used with as few as four pins when being used as a replacement with an EPCQ-A device
- High bandwidth
Intel® FPGA Configuration Devices work with dedicated logic in Intel® Cyclone®, Stratix®, and Arria® devices to implement reliable remote system upgrade. Dedicated recovery circuitry guarantees "always operational" functionality by ensuring that even if an update or configuration error occurs, the FPGA always returns to a known state to operate correctly.
|Macronix*||MX66U||512Mb & 2Gb||Support for Macronix*MX66U devices can be use as replacement devices to support Intel® Stratix® 10 device active serial configuration scheme in the Intel® Quartus® Prime Pro Edition software version 18.0 and later as detailed in this Knowledge Base entry.|
|Micron*||MT25Q||256Mb - 2Gb†||Support for Micron* MT25Q devices may be enabled as a replacement for EPCQ/L devices using an ini variable as detailed in the device support for replacement EPCQ (>=256Mb) and EPCQ-L kdb.|
|Configuration Device Family||Capacity||Package||Voltage||FPGA Product Family Compatibility|
|EPCQ-A†||4 Mb - 32 Mb||8-pin SOIC||3.3 V||Compatible with Stratix® V, Arria® V, Cyclone® V, Intel® Cyclone® 10 LP and earlier FPGA families.|
|EPCQ-A†||64 Mb - 128 Mb||16-pin SOIC||3.3 V||Compatible with Stratix® V, Arria® V, Cyclone® V, Intel® Cyclone® 10 LP and earlier FPGA families.|
† EPCQ-A family is supported from Intel® Quartus® Prime Standard Edition Software v17.1 onwards. For product family support for legacy families not included in version 17.1 file a Service Request.
Intel® FPGA Configuration Devices have an advanced feature set that includes in-system programmability (ISP) and flash memory access, in board-space-saving packages.
|In-System Programmability (ISP)||Increases design flexibility, allowing in-system design updates and reduces costs by streamlining the manufacturing process.|
|Memory Access||Several interface peripherals available with the Nios® and Nios® II embedded processors allow you to access the serial configuration device as a memory module connected to your embedded system. Device memory capacity not consumed storing configuration data can be used as general-purpose non-volatile memory, which is perfect for program and data storage. You can also use a Nios® II processor to modify configuration data, which is useful for in-field system upgrades.|
|Small Form Factor||8-pin/16-pin SOIC or 24-ball BGA packages.|
ISP Provides Maximum Flexibility
All Intel's serial configuration devices have the capability for ISP. Intel provides ISP support in serial configuration devices via Intel's active serial programming interface.
When a design goes into volume production, designers using one-time-programmable configuration devices must remove these devices and replace them with new parts for system upgrades. With ISP capability in Intel's serial configuration devices, you can easily perform system upgrades by using an on-board processor or a programming cable to significantly reduce downtime and cost.
If board area is limited, Intel's serial configuration devices can be programmed using a JTAG port through the FPGA. The Intel® Quartus® Prime Design Software can automatically download the Flash Loader design to make the FPGA into a JTAG programmer of the serial configuration devices.
ISP Through Active Serial Programming Interface
ISP Through JTAG Programming Interface
Flash Memory Access
The unused portions of the flash memory can be used as general-purpose memory. You can access this general-purpose memory using a Nios® II embedded processor, which makes the serial configuration devices a complete combination of flash and configuration solution.
You can even use this memory as a ROM for your embedded processor's bootloader program. This can reduce board space requirements, eliminate the need for an extra on-board memory module, and ultimately reduce the overall cost of the system.
Flash Memory Access Using the Nios® II Processor
Small Form Factor Saves Valuable Board Space
An important aspect of total design cost is board space. The more board space a solution consumes, the higher the cost of that solution. Intel’s serial configuration devices take up as little as 30 square millimeters of board space, which minimizes the amount of board space taken by a complete SOPC solution. Vertical migration is supported for all of the serial configuration devices using the same package.
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