FPGA accelerated DPDK SmartNIC
About this offer
FPGA accelerated DPDK SmartNIC is ready-to-use solution for different applications to offload processing of high-speed network traffic into FPGA accelerator card. It completely remove the risk, uncertainty, and time of FPGA firmware development. Customer creates only software without the need for FPGA know-how and HW development team. Solution provides single standardized API following DPDK standard. It supports packet transfers using our Ultra-Fast FPGA DMA engine with open-source drivers, dynamic software-defined RTE Flow filtering and offload with multiple rule tables, static configuration of traffic processing, dynamic traffic flow management and many more.
Availability and Pricing
Order Lead Time (Days): 90
- Solution: Partner Solutions
- End Customer Type:
Small and Medium sized Business
- Solution Availability:
- Deployment Architecture:
Included Intel Technology
Intel® Stratix® 10 FPGAs and SoC FPGAs
Stratix® V FPGAs
Intel® Arria® 10 FPGAs and SoC FPGAs
Intel® Agilex™ 7 FPGAs and SoC FPGAs
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BrnoLogic is FPGA design house that focuses on wire-speed packet processing acceleration for 400 Gbps and beyond. With its accelerated DPDK NIC solution allows customers to focus on the software side of their network application and don't care about FPGA design.
Fpga Accelerated Dpdk Smartnic
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