Intel Foundry Services DAC Program Highlights
Learn how Intel’s advanced process, world-leading advanced packaging technology, robust design ecosystem, geo-diverse supply, and flexible business models can help accelerate your innovation into silicon.
The Design Automation Conference (DAC) is recognized as the premier event for the design and design automation of electronic chips to systems. DAC offers outstanding training, education, exhibits, and superb networking opportunities for designers, researchers, tool developers, and vendors. The conference is sponsored by the Association for Computing Machinery (ACM) and the Institute of Electrical and Electronics Engineers (IEEE) and is supported by ACM’s Special Interest Group on Design Automation (SIGDA) and IEEE’s Council on Electronic Design Automation (CEDA).
Come and join Intel Foundry Services (IFS) at DAC to learn more about how Intel’s advanced process and world-leading advanced packaging technology, robust design ecosystem, geo-diverse supply, and flexible business models can help accelerate your innovation into silicon.
IFS DAC Program Highlights
Check out these Transformative Technologies Theater sessions and panels where IFS executives Craig Orr and Bob Brennan talk about IFS’ robust ecosystem including IFS Accelerator, RISC-V, as well as PowerVia and EMIB.
Transformative Technologies Theater
Executive Panel: Creating Robust EDA and IP Ecosystems to Strengthen the Global Semiconductor Supply Chain
Time: Tuesday, July 11th, 4:30pm - 5:00pm PDT
Location: Level 1
Speakers: Craig Orr, Manju Shamanna
IP Track
Delivering on RISC-V's Promise to Give Designers Freedom to Innovate—What's Needed?
Time: Wednesday, July 12th, 10:30am - 12:00pm PDT
Location: 2012, 2nd Floor
Speaker: Bob Brennan
Transformative Technologies Theater
Enabling AI at Zettascale: Wafers, Chiplets, or Both?
Time: Wednesday, July 12th, 2:30pm - 3:15pm PDT
Location: Level 1
Speaker: Ravi Mahajan
Session Schedule at IFS Theater at Booth #1341
Listen to the speakers from industry-leading EDA, IP, Design Services, Cloud, USMAG companies, and Intel Foundry Services at a variety of technical sessions. Random lucky draws throughout the day!
Schedule subject to change.
Monday, July 10 |
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Time | Title | Speaker |
10:30am - 10:50am |
HCLTech - IFS Partnership |
Srinivas Ambati, HCLTech |
11:00am - 11:20am |
SiFive - IFS Partnership, Co-optimization and Ecosystem Building |
Phil Dworsky, SiFive |
11:20am - 11:40am |
Wipro - Semiconductor Services |
Satish Premanathan, Wipro |
11:40am - 12:00pm |
Synopsys - IFS Collaboration on Advanced Nodes |
Krishna Devineni, Synopsys |
Lunch Break | ||
1:00pm - 1:20pm |
On-chip ML-driven Monitoring from Design to Field |
Nir Sever, proteanTecs |
1:30pm - 1:50pm |
Ansys - Multiphysics 3D-IC Platform Enabled in IFS Flow |
Marc Swinnen, Ansys |
2:00pm - 2:30pm |
Reference Flows for EMIB-based Advanced Packaging |
Satish Surana, IFS |
2:30pm - 2:50pm |
Proven IC Design Expertise |
Levon Barseghyan, Aragio |
3:00pm - 3:20pm |
M31 - IFS DAC 2023 |
Jayanta Lahiri, M31 |
3:30pm - 3:50pm |
Cadence - 3D-IC Solutions |
Jags Jayachandran, Cadence |
4:00pm - 4:20pm |
Analog IP the Way You Want it on Intel Foundry Services |
Chris Morrison, Agile Analog |
Tuesday, July 11 |
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Time | Title | Speaker |
10:30am - 10:50am |
Collaborating to Drive Multi-Die System Success |
Mark Richards, Synopsys |
11:00am - 11:20am |
Semiconductor Design and Verification on AWS |
Karan Singh, Amazon AWS |
11:20am - 11:40am |
Silicon Proven Low Jitter PLL’s, Sensors and IO’s in Intel 16 and IP’s in Intel 3 |
Mahesh Tirupattur, Analog Bits |
11:40am - 12:00pm |
Analysis and Verification Platform for Multi-Chiplet Platform Design |
John Ferguson, Siemens EDA |
Lunch Break | ||
1:00pm - 1:20pm |
Six Essential Steps for a Successful IFS Migration |
Yatin Trivedi, Capgemini |
1:30pm - 1:50pm |
DAC 2023 - Microsoft and Intel Foundry Services |
Preetish Sinha, Microsoft Azure |
2:00pm - 2:30pm |
Intel PowerVia Design Considerations to Optimize SOC Design |
IFS |
2:30pm - 2:50pm |
Clocking Solutions for Intel Foundry Services Advanced Nodes |
Randy Caplan, Silicon Creations |
3:00pm - 3:20pm |
Building Chips at IFS Using Cadence LPDDR5, PCIe5, Ethernet, MIPI and USB IP |
Marc Greenberg, Cadence |
3:30pm - 3:50pm |
Secure OTP and PUF-based Solutions for Hardware Security |
John Chou, eMemory |
IFS Session Schedule at Partner Booths
Monday, July 10 |
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Time |
Title |
IFS Speaker |
Partner Booth |
11:30am - 12:00pm |
Accelerating Innovation: Intel Foundry Services & Microsoft Azure |
Lalit Gajare |
Microsoft Azure |
Tuesday, July 11 |
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Time |
Title |
IFS Speaker |
Partner Booth |
7:00am - 8:30pm |
Driving Design Excellence: The Future of Automotive Electronics |
Ajay Sharma |
Ansys (Marriott Marquis, Golden Gate B) |
12:00pm - 1:00pm |
Improving Reliability with the Calibre DesignEnhancer Via Flow |
Lalit Gajare |
Siemens EDA |
2:30pm - 3:00pm |
Intel PADK and Reference Flows for EMIB-based Advanced Packaging |
Satish Surana |
Siemens EDA |
Wednesday, July 12 |
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Time |
Title |
IFS Speaker |
Partner Booth |
2:30pm - 3:00pm |
Intel PADK & Reference Flows for EMIB-based Advanced Packaging |
Satish Surana |
Ansys |