AXI Multichannel DMA Intel® FPGA IP for PCI Express* Release Notes

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ID 817914
Date 7/08/2024
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1. AXI Multichannel DMA Intel FPGA IP for PCI Express Release Notes
1. AXI Multichannel DMA Intel FPGA IP for PCI Express Release Notes x
1.1. AXI Multichannel DMA Intel FPGA IP for PCI Express v2.0.0 1.2. AXI Multichannel DMA Intel FPGA IP for PCI Express v1.0.0
1. AXI Multichannel DMA Intel FPGA IP for PCI Express Release Notes

1.1. AXI Multichannel DMA Intel FPGA IP for PCI Express v2.0.0

Table 1.  v2.0.0 2024.07.22
Quartus® Prime Version Description Impact
24.2 Added support for AXI Streaming Device-side Packet Loopback design example.

You can generate an AXI Streaming Device-side Packet Loopback design example, generate the bitstream, and perform a hardware test.

Note: Design example simulation and full timing closure are not supported in the current release.
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