GTS AXI Streaming Intel® FPGA IP for PCI Express* User Guide

ID 813754
Date 8/07/2024
Public
Document Table of Contents

8. Registers

The subsequent sections describe the GTS AXI Streaming IP registers in detail. Refer to the following table for the definition of the acronyms used in the "Attribute" column.
Table 57.  Register Attribute Definition
Attribute Definition
RW Read Write
RWS Read Write Sticky
RO Read Only
ROS Read Only Sticky
WO Write Only
RW1S Read Write 1 to Set. Clear by Hardware.
RW1C Read Write 1 to Clear. Set by Hardware.
RW1CS Read Write 1 to Clear sticky
RsvdZ Reserved, Return 0.
Hwinit Hardware Initiate