Intel Agilex® 5 FPGAs and SoCs Device Overview

ID 762191
Date 9/15/2023
Document Table of Contents

14. Variable Pitch BGA (VPBGA) Package Design of Intel Agilex® 5 FPGAs and SoCs

Most of the Intel Agilex® 5 FPGAs and SoCs packages use the VPBGA package design. The E-Series FPGAs also offer 0.5 mm ball pitch package with a standard ball grid for small form-factor with more I/O counts.

Compared to the standard ball grid array (BGA) packages, the VPBGA package has a variable ball pitch size with a minimum size of 0.65 mm.

Figure 13. Comparison Between Standard BGA and VPBGA

The variable ball pitch helps reduce the package form factor. Despite the smaller package size, the VPBGA packages can provide the same I/O pin count and compatible electrical performance compared to the standard BGA packages.

As shown in the following figure, the variable ball grid pattern eases trace routability, reducing the design complexity, number of PCB layers, and board thickness and size—ultimately, reducing board cost and development time.

Figure 14. Example of PCB Trace Routing for Variable Pitch BGA (VPBGA) Package

Did you find the information on this page useful?

Characters remaining:

Feedback Message