Symmetric Cryptographic Intel® FPGA Hard IP Release Notes

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ID 722029
Date 4/03/2023
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1. Symmetric Cryptographic Intel FPGA Hard IP Release Notes
1. Symmetric Cryptographic Intel FPGA Hard IP Release Notes x
1.1. Symmetric Cryptographic Intel FPGA Hard IP v1.4.0 1.2. Symmetric Cryptographic Intel FPGA Hard IP v1.3.0 1.3. Symmetric Cryptographic Intel FPGA Hard IP v1.2.0 1.4. Symmetric Cryptographic Intel FPGA Hard IP v1.1.1 1.5. Symmetric Cryptographic Intel FPGA Hard IP v1.1.0 1.6. Symmetric Cryptographic Intel FPGA Hard IP v1.0.0 1.7. Symmetric Cryptographic Intel FPGA Hard IP User Guide Archives
1. Symmetric Cryptographic Intel FPGA Hard IP Release Notes

1.3. Symmetric Cryptographic Intel FPGA Hard IP v1.2.0

Table 3.   v1.2.0 2022.09.26
Intel® Quartus® Prime Version Description Impact
22.3
  • Added support for -1 and -3 fabric speed grades.
  • Added simulation support for 9 Design Example variants.
  • Added hardware support for 8 out of 9 Design Example variants.
  • Renamed XTS Protection button to Allow XTS+other High-Frequency Interleaving button.
  • Removed support for Aldec Riviera.
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Provided Simulation-Only support for AES XTS and GCM Cycle-Based Interleave Design Example variant.

Hardware is not supported for this Design Example variant.
Level Two Title