External Memory Interface Handbook Volume 1: Intel® FPGA Memory Solution Introduction and Design Flow: For UniPHY-based Device Families

ID 710283
Date 3/06/2023
Public
Document Table of Contents

1.3. Arria 10 EMIF Future Protocol Support

The following table lists planned future memory protocol support for Arria 10 EMIF IP.
Protocol Current Support Future Support
DDR4
  • Hard PHY and Hard Controller
  • Hard PHY only
Yes (LRDIMM, RDIMM, x4 DQ/DQS)
DDR3
  • Hard PHY and Hard Controller
  • Hard PHY only
Yes (LRDIMM, RDIMM, x4 DQ/DQS)
DDR2 No Yes (via Altera PHYLite for Memory)
LPDDR3 Yes Yes
LPDDR2 No Yes (via Altera PHYLite for Memory)
QDR II / II+ / QDR II+ Xtreme Hard PHY and Soft Controller Yes
RLDRAM 3 Hard PHY only Yes
RLDRAM II No Yes (via Altera PHYLite for Memory)