Fronthaul Compression Intel® FPGA IP User Guide

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ID 709301
Date 2/20/2023
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Document Table of Contents
Document Table of Contents x
1. About the Fronthaul Compression Intel® FPGA IP 2. Getting Started with the Fronthaul Compression Intel® FPGA IP 3. Fronthaul Compression IP Functional Description 4. Fronthaul Compression IP Registers 5. Fronthaul Compression Intel FPGA IPs User Guide Archive 6. Document Revision History for the Fronthaul Compression Intel® FPGA IP User Guide
1. About the Fronthaul Compression Intel® FPGA IP x
1.1. Fronthaul Compression Intel® FPGA IP Features 1.2. Fronthaul Compression Intel® FPGA IP Device Family Support 1.3. Release Information for the Fronthaul Compression Intel® FPGA IP 1.4. Fronthaul Compression Performance and Resource Usage
2. Getting Started with the Fronthaul Compression Intel® FPGA IP x
2.1. Obtaining, Installing, and Licensing the Fronthaul Compression IP 2.2. Parameterizing the Fronthaul Compression IP 2.3. Generated IP File Structure
2.2. Parameterizing the Fronthaul Compression IP x
2.2.1. Fronthaul Compression IP Parameters
3. Fronthaul Compression IP Functional Description x
3.1. Fronthaul Compression IP Signals
1. About the Fronthaul Compression Intel® FPGA IP
2. Getting Started with the Fronthaul Compression Intel® FPGA IP
3. Fronthaul Compression IP Functional Description
4. Fronthaul Compression IP Registers
5. Fronthaul Compression Intel FPGA IPs User Guide Archive
6. Document Revision History for the Fronthaul Compression Intel® FPGA IP User Guide

1.4. Fronthaul Compression Performance and Resource Usage

The resources of the IP targeting an Intel Agilex device, Intel Arria 10 device, and Intel Stratix 10 device
Table 4.  Fronthaul Compression Performance and Resource UsageAll entries are for compression and decompression data direction IP
Device IP ALMs Logic registers M20K
  Primary Secondary
Intel Agilex Block-floating point 14,969 25,689 6,093 0
µ-law 22,704 39,078 7,896 0
Block-floating point and µ-law 23,739 41,447 8,722 0
Block-floating point, µ-law, and extended IQ width 23,928 41,438 8,633 0
Intel Arria 10 Block-floating point 12,403 16,156 5,228 0
µ-law 18,606 23,617 5,886 0
Block-floating point and µ-law 19,538 24,650 6,140 0
Block-floating point, µ-law, and extended IQ width 19,675 24,668 6,141 0
Intel Stratix 10 Block-floating point 16,852 30,548 7,265 0
µ-law 24,528 44,325 8,080 0
Block-floating point and µ-law 25,690 47,357 8,858 0
Block-floating point, µ-law, and extended IQ width 25,897 47,289 8,559 0
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