External Memory Interface Handbook Volume 3: Reference Material

ID 683841
Date 7/24/2019
Public
Document Table of Contents

9.3. Signal Descriptions

The following tables lists the signals of the controller’s Avalon-MM slave interface.

Table 106.  Avalon-MM Slave Interface Signals

Signal Name

Width

Direction

Avalon-MM Signal Type

amm_ready_i

1

Out

waitrequest_n
amm_read_i

1

In

read
amm_write_i

1

In

write
amm_address_i

21-25

In

address
amm_readdatavalid_i

1

Out

readdatavalid
amm_readdata_i

18, 36, 72

Out

readdata
amm_writedata_i

18, 36, 72

In

writedata
amm_burstcount_i

ceil(log2(CTRL_QDR4_AVL_MAX_BURST_COUNT+1))

In

burstcount
emif_usr_clk

1

Out

clk
emif_usr_reset_n

1

Out

reset_n
global_reset_n

1

In

reset_n
Note:
  1. In the above table, the _i suffix represents the Avalon-MM interface index, which has the range of 0-7.
  2. To obtain the actual signal width for the data ports (readdata, writedata), you must multiply the widths in the above table by the data width ratio and the width expansion ratio.
    • emif_usr_clk: User clock domain.
    • emif_usr_reset_n: Reset for the clock domain. Asynchronous assertion and synchronous deassertion (to the emif_usr_clk clock signal).
    • global_reset_n: Asynchronous reset causes the memory interface to be reset and recalibrated.

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