External Memory Interface Handbook Volume 3: Reference Material

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ID 683841
Date 7/24/2019
Public
Document Table of Contents

13.7.9. RLDRAM II Resource Utilization in Arria V Devices

The following table shows typical resource usage of the RLDRAM II controller with UniPHY in the current version of Quartus Prime software for Arria V devices.
Table 128.  Resource Utilization in Arria V Devices  (Part 1 of 2)

PHY Rate

Memory Width (Bits)

Combinational ALUTs

Logic Registers

M10K Blocks

Memory (Bits)

Hard Memory Controller

Controller

Half

9

353

303

1

288

0

18

350

324

2

576

0

36

350

402

4

1152

0

PHY

Half

9

295

474

0

0

0

18

428

719

0

0

0

36

681

1229

0

0

0

Total

Half

9

705

777

1

288

0

18

871

1043

2

576

0

36

1198

1631

4

1152

0

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