External Memory Interface Handbook Volume 3: Reference Material: For UniPHY-based Device Families

ID 683841
Date 3/06/2023
Document Table of Contents

9. Functional Description—QDR-IV Controller

The QDR-IV controller translates memory requests from the Avalon Memory-Mapped (Avalon-MM) interface to AFI, while satisfying timing requirements imposed by the memory configuration. QDR-IV has two independent bidirectional data ports, each of which can perform read and write operations on each memory clock cycle, subject to bank address and bus turnaround restrictions. To maximize data bus utilization, the QDR-IV controller provides eight separate Avalon interfaces, one for each QDR-IV data port and time slot (at quarter rate).