External Memory Interface Handbook Volume 3: Reference Material: For UniPHY-based Device Families

ID 683841
Date 3/06/2023
Public
Document Table of Contents

3.9.1. Calibration Stages

At a high level, the calibration routine consists of address and command calibration, read calibration, and write calibration.

The stages of calibration vary, depending on the protocol of the external memory interface.

Table 45.  Calibration Stages by Protocol
Stage DDR4 DDR3 LPDDR3 RLDRAM II/3 QDR-IV QDR II/II+
Address and command
Leveling Yes Yes
Deskew Yes Yes Yes
Read
DQSen Yes Yes Yes Yes Yes Yes
Deskew Yes Yes Yes Yes Yes Yes
VREF-In Yes Yes
LFIFO Yes Yes Yes Yes Yes Yes
Write
Leveling Yes Yes Yes Yes Yes
Deskew Yes Yes Yes Yes Yes Yes
VREF-Out Yes