External Memory Interface Handbook Volume 3: Reference Material: For UniPHY-based Device Families

ID 683841
Date 3/06/2023
Document Table of Contents

12.1. Arria 10 EMIF IP Example Designs Quick Start Guide

A new interface and more automated design example flow is available for Arria 10 external memory interfaces.

The Example Designs tab is available in the parameter editor when you specify an Arria 10 target device. This tab allows you to select from a list of presets for Intel FPGA development kits and target interface protocols. All tabs are automatically parameterized with appropriate values, based on the preset that you select. You can specify that the system create directories for simulation and synthesis file sets, and generate the file sets automatically.

You can generate an example design specifically for an Intel FPGA development kit, or for any EMIF IP that you generate.

Figure 168. Using the Example Design