Intel® Agilex™ Device Security User Guide

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ID 683823
Date 11/22/2022
Public
Document Table of Contents
Document Table of Contents x
1. Intel® Agilex® Device Security Overview 2. Authentication and Authorization 3. AES Bitstream Encryption 4. Device Provisioning 5. Advanced Features 6. Intel® Agilex™ Device Security User Guide Archives 7. Revision History for the Intel® Agilex® Device Security User Guide
1. Intel® Agilex® Device Security Overview x
1.1. Commitment to Product Security 1.2. Planned Security Features 1.3. Available Security Documentation
1.2. Planned Security Features x
1.2.1. Partial Reconfiguration Bitstream Security Verification 1.2.2. Device Self-Kill for Physical Anti-Tamper
2. Authentication and Authorization x
2.1. Creating a Signature Chain 2.2. Signing a Configuration Bitstream
2.1. Creating a Signature Chain x
2.1.1. Creating Authentication Key Pairs on the Local File System 2.1.2. Creating Authentication Key Pairs in SoftHSM 2.1.3. Creating the Signature Chain Root Entry 2.1.4. Creating a Signature Chain Public Key Entry
2.2. Signing a Configuration Bitstream x
2.2.1. Quartus Key File Assignment 2.2.2. Co-Signing SDM Firmware 2.2.3. Signing Configuration Bitstream Using the quartus_sign Command 2.2.4. Partial Reconfiguration Multi-Authority Support 2.2.5. Verifying Configuration Bitstream Signature Chains
3. AES Bitstream Encryption x
3.1. Creating the AES Root Key 3.2. Quartus Encryption Settings 3.3. Encrypting a Configuration Bitstream
3.3. Encrypting a Configuration Bitstream x
3.3.1. Configuration Bitstream Encryption Using the Programming File Generator Graphical Interface 3.3.2. Configuration Bitstream Encryption Using the Programming File Generator Command Line Interface 3.3.3. Partially Encrypted Configuration Bitstream Generation Using the Command Line Interface 3.3.4. Partial Reconfiguration Bitstream Encryption
4. Device Provisioning x
4.1. Using SDM Provision Firmware 4.2. Using QSPI Factory Default Helper Image on Owned Devices 4.3. Authentication Root Key Provisioning 4.4. Programming Key Cancellation ID Fuses 4.5. Canceling Root Keys 4.6. Programming Counter Fuses 4.7. Secure Data Object Service Root Key Provisioning 4.8. Security Setting Fuse Provisioning 4.9. AES Root Key Provisioning 4.10. Converting Owner Root Key, AES Root Key Certificates, and Fuse files to Jam STAPL File Formats
4.3. Authentication Root Key Provisioning x
4.3.1. Partial Reconfiguration Multi-Authority Root Key Programming
4.9. AES Root Key Provisioning x
4.9.1. AES Root Key Compact Certificate 4.9.2. Intrinsic ID® PUF AES Root Key Provisioning 4.9.3. Black Key Provisioning
4.9.2. Intrinsic ID® PUF AES Root Key Provisioning x
4.9.2.1. Intrinsic ID PUF Enrollment 4.9.2.2. Wrapping the AES Root Key 4.9.2.3. Programming Helper Data and Wrapped Key to QSPI Flash Memory 4.9.2.4. Querying Intrinsic ID PUF Activation Status 4.9.2.5. Location of the PUF in Flash Memory
4.9.3. Black Key Provisioning x
4.9.3.1. Black Key Provisioning Options
5. Advanced Features x
5.1. Secure Debug Authorization 5.2. HPS Debug Certificates 5.3. Platform Attestation 5.4. Physical Anti-Tamper 5.5. Using Design Security Features with Remote System Update 5.6. SDM Cryptographic Services
5.4. Physical Anti-Tamper x
5.4.1. Anti-Tamper Responses 5.4.2. Anti-Tamper Detection 5.4.3. Anti-Tamper Lite Intel® FPGA IP
5.4.3. Anti-Tamper Lite Intel® FPGA IP x
5.4.3.1. Release Information
5.6. SDM Cryptographic Services x
5.6.1. Vendor Authorized Boot 5.6.2. Secure Data Object Service 5.6.3. SDM Cryptographic Primitive Services
1. Intel® Agilex® Device Security Overview
2. Authentication and Authorization
3. AES Bitstream Encryption
4. Device Provisioning
5. Advanced Features
6. Intel® Agilex™ Device Security User Guide Archives
7. Revision History for the Intel® Agilex® Device Security User Guide

2.2.4. Partial Reconfiguration Multi-Authority Support

Intel® Agilex™ devices support partial reconfiguration multi-authority authentication, where the device owner creates and signs the static bitstream, and a separate PR owner creates and signs PR persona bitstreams. Intel® Agilex™ devices implement multi-authority support by assigning the first authentication root key slots to the device or static bitstream owner and assigning the final authentication root key slot to the partial reconfiguration persona bitstream owner.
If the authentication feature is enabled, then all PR persona images must be signed, including nested PR persona images. PR persona images may be signed by either the device owner or by the PR owner; however, static region bitstreams must be signed by the device owner.
Note: Partial Reconfiguration static and persona bitstream encryption when multi-authority support is enabled is planned in a future release.

Implementing partial reconfiguration multi-authority support requires several steps:

  1. The device or static bitstream owner generates one or more authentication root keys as described in Creating Authentication Key Pairs in SoftHSM, where the --key_type option has value owner.
  2. The partial reconfiguration bitstream owner generates an authentication root key but changes the --key_type option value to secondary_owner.
  3. Both the static bitstream and partial reconfiguration design owners ensure that the Enable Multi-Authority support checkbox is enabled in the Assignments > Device > Device and Pin Options > Security tab.
    Figure 2.  Intel® Quartus® Prime Enable Multi-Authority Option Settings
  4. Both the static bitstream and partial reconfiguration design owners create signature chains based on their respective root keys as described in Creating a Signature Chain.
  5. Both the static bitstream and partial reconfiguration design owners convert their compiled designs to .rbf format files and sign the .rbf files.
  6. The device or static bitstream owner generates and signs a PR public key program authorization compact certificate.
    quartus_pfg --ccert –o ccert_type=PR_PUBKEY_PROG_AUTH \
–o owner_qky_file="root0.qky;root1.qky" unsigned_pr_pubkey_prog.ccert
    quartus_sign --family=agilex --operation=sign \ 
--qky=design0_sign_chain.qky --pem=design0_sign_private.pem \ 
--cancel=svnA:0 unsigned_pr_pubkey_prog.ccert signed_pr_pubkey_prog.ccert
    quartus_sign --family=agilex --operation=sign --module=softHSM \
--module_args="--token_label=s10-token --user_pin=s10-token-pin \
--hsm_lib=/usr/local/lib/softhsm/libsofthsm2.so" \
--keyname=design0_sign --qky=design0_sign_chain.qky \
--cancel=svnA:0 unsigned_pr_pubkey_prog.ccert signed_pr_pubkey_prog.ccert
  7. The device or static bitstream owner provisions their authentication root key hashes to the device, then programs the PR public key program authorization compact certificate, and finally provisions the partial reconfiguration bitstream owner root key to the device. The Device Provisioning section describes this provisioning process.
  8. Intel® Agilex™ device is configured with the static region .rbf file.
  9. Intel® Agilex™ device is partially reconfigured with the persona design .rbf file.
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