Intel® Agilex™ Device Security User Guide

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ID 683823
Date 11/22/2022
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Document Table of Contents
Document Table of Contents x
1. Intel® Agilex® Device Security Overview 2. Authentication and Authorization 3. AES Bitstream Encryption 4. Device Provisioning 5. Advanced Features 6. Intel® Agilex™ Device Security User Guide Archives 7. Revision History for the Intel® Agilex® Device Security User Guide
1. Intel® Agilex® Device Security Overview x
1.1. Commitment to Product Security 1.2. Planned Security Features 1.3. Available Security Documentation
1.2. Planned Security Features x
1.2.1. Partial Reconfiguration Bitstream Security Verification 1.2.2. Device Self-Kill for Physical Anti-Tamper
2. Authentication and Authorization x
2.1. Creating a Signature Chain 2.2. Signing a Configuration Bitstream
2.1. Creating a Signature Chain x
2.1.1. Creating Authentication Key Pairs on the Local File System 2.1.2. Creating Authentication Key Pairs in SoftHSM 2.1.3. Creating the Signature Chain Root Entry 2.1.4. Creating a Signature Chain Public Key Entry
2.2. Signing a Configuration Bitstream x
2.2.1. Quartus Key File Assignment 2.2.2. Co-Signing SDM Firmware 2.2.3. Signing Configuration Bitstream Using the quartus_sign Command 2.2.4. Partial Reconfiguration Multi-Authority Support 2.2.5. Verifying Configuration Bitstream Signature Chains
3. AES Bitstream Encryption x
3.1. Creating the AES Root Key 3.2. Quartus Encryption Settings 3.3. Encrypting a Configuration Bitstream
3.3. Encrypting a Configuration Bitstream x
3.3.1. Configuration Bitstream Encryption Using the Programming File Generator Graphical Interface 3.3.2. Configuration Bitstream Encryption Using the Programming File Generator Command Line Interface 3.3.3. Partially Encrypted Configuration Bitstream Generation Using the Command Line Interface 3.3.4. Partial Reconfiguration Bitstream Encryption
4. Device Provisioning x
4.1. Using SDM Provision Firmware 4.2. Using QSPI Factory Default Helper Image on Owned Devices 4.3. Authentication Root Key Provisioning 4.4. Programming Key Cancellation ID Fuses 4.5. Canceling Root Keys 4.6. Programming Counter Fuses 4.7. Secure Data Object Service Root Key Provisioning 4.8. Security Setting Fuse Provisioning 4.9. AES Root Key Provisioning 4.10. Converting Owner Root Key, AES Root Key Certificates, and Fuse files to Jam STAPL File Formats
4.3. Authentication Root Key Provisioning x
4.3.1. Partial Reconfiguration Multi-Authority Root Key Programming
4.9. AES Root Key Provisioning x
4.9.1. AES Root Key Compact Certificate 4.9.2. Intrinsic ID® PUF AES Root Key Provisioning 4.9.3. Black Key Provisioning
4.9.2. Intrinsic ID® PUF AES Root Key Provisioning x
4.9.2.1. Intrinsic ID PUF Enrollment 4.9.2.2. Wrapping the AES Root Key 4.9.2.3. Programming Helper Data and Wrapped Key to QSPI Flash Memory 4.9.2.4. Querying Intrinsic ID PUF Activation Status 4.9.2.5. Location of the PUF in Flash Memory
4.9.3. Black Key Provisioning x
4.9.3.1. Black Key Provisioning Options
5. Advanced Features x
5.1. Secure Debug Authorization 5.2. HPS Debug Certificates 5.3. Platform Attestation 5.4. Physical Anti-Tamper 5.5. Using Design Security Features with Remote System Update 5.6. SDM Cryptographic Services
5.4. Physical Anti-Tamper x
5.4.1. Anti-Tamper Responses 5.4.2. Anti-Tamper Detection 5.4.3. Anti-Tamper Lite Intel® FPGA IP
5.4.3. Anti-Tamper Lite Intel® FPGA IP x
5.4.3.1. Release Information
5.6. SDM Cryptographic Services x
5.6.1. Vendor Authorized Boot 5.6.2. Secure Data Object Service 5.6.3. SDM Cryptographic Primitive Services
1. Intel® Agilex® Device Security Overview
2. Authentication and Authorization
3. AES Bitstream Encryption
4. Device Provisioning
5. Advanced Features
6. Intel® Agilex™ Device Security User Guide Archives
7. Revision History for the Intel® Agilex® Device Security User Guide

2.1.2. Creating Authentication Key Pairs in SoftHSM

The SoftHSM examples in this chapter are self-consistent. Certain parameters depend on your SoftHSM installation and a token initialization within SoftHSM.

The quartus_sign tool depends on the PKCS #11 API library from your HSM.

The examples in this section assume that the SoftHSM library is installed to one of the following locations:
  • /usr/local/lib/softhsm2.so on Linux
  • C:\SoftHSM2\lib\softhsm2.dll on 32-bit version of Windows
  • C:\SoftHSM2\lib\softhsm2-x64.dll on 64-bit version of Windows.
Initialize a token within SoftHSM using the softhsm2-util tool: 
softhsm2-util --init-token --label agilex-token --pin agilex-token-pin \
--so-pin agilex-so-pin --free

The option parameters, particularly the token label and token pin are examples used throughout this chapter. Intel recommends that you follow instructions from your HSM vendor to create and manage tokens and keys.

You create authentication key pairs using the pkcs11-tool utility to interact with the token in SoftHSM. Instead of explicitly referring to the private and public key .pem files in the file system examples, you refer to the key pair by its label and the tool selects the appropriate key automatically.

Run the following commands to create a key pair used as the root key in later examples as well as a key pair used as a design signing key in the signature chain: 
pkcs11-tool --module=/usr/local/lib/softhsm/libsofthsm2.so \
--token-label agilex-token --login --pin agilex-token-pin --keypairgen \
--mechanism ECDSA-KEY-PAIR-GEN --key-type EC:secp384r1 --usage-sign \
--label root0 --id 0
pkcs11-tool --module=/usr/local/lib/softhsm/libsofthsm2.so \
--token-label agilex-token --login --pin agilex-token-pin --keypairgen \
--mechanism ECDSA-KEY-PAIR-GEN --key-type EC:secp384r1 --usage-sign \
--label design0_sign --id 1
Note: The ID option in this step must be unique to each key, but it is used only by the HSM. This ID option is unrelated to the key cancellation ID assigned in the signature chain.
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