Intel® Agilex™ Device Security User Guide

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ID 683823
Date 1/20/2022
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Document Table of Contents
Document Table of Contents x
1. Intel® Agilex® Device Security Overview 2. Authentication and Authorization 3. AES Bitstream Encryption 4. Device Provisioning 5. Advanced Features 6. Intel® Agilex™ Device Security User Guide Archives 7. Revision History for the Intel® Agilex® Device Security User Guide
1. Intel® Agilex® Device Security Overview x
1.1. Commitment to Product Security 1.2. Planned Security Features
1.2. Planned Security Features x
1.2.1. Partial Reconfiguration Bitstream Security Verification 1.2.2. Device Self-Kill for Physical Anti-Tamper
2. Authentication and Authorization x
2.1. Creating a Signature Chain 2.2. Signing a Configuration Bitstream
2.1. Creating a Signature Chain x
2.1.1. Creating Authentication Key Pairs on the Local File System 2.1.2. Creating Authentication Key Pairs in SoftHSM 2.1.3. Creating the Signature Chain Root Entry 2.1.4. Creating a Signature Chain Public Key Entry
2.2. Signing a Configuration Bitstream x
2.2.1. Quartus Key File Assignment 2.2.2. Co-Signing SDM Firmware 2.2.3. Signing Configuration Bitstream Using the quartus_sign Command 2.2.4. Partial Reconfiguration Multi-Authority Support 2.2.5. Verifying Configuration Bitstream Signature Chains
3. AES Bitstream Encryption x
3.1. Creating the AES Root Key 3.2. Quartus Encryption Settings 3.3. Encrypting a Configuration Bitstream
3.3. Encrypting a Configuration Bitstream x
3.3.1. Configuration Bitstream Encryption Using the Programming File Generator Graphical Interface 3.3.2. Configuration Bitstream Encryption Using the Programming File Generator Command Line Interface 3.3.3. Partially Encrypted Configuration Bitstream Generation Using the Command Line Interface 3.3.4. Partial Reconfiguration Bitstream Encryption
4. Device Provisioning x
4.1. Using SDM Provision Firmware 4.2. Using QSPI Factory Default Helper Image on Owned Devices 4.3. Authentication Root Key Provisioning 4.4. Programming Key Cancellation ID Fuses 4.5. Canceling Root Keys 4.6. Programming Counter Fuses 4.7. Secure Data Object Service Root Key Provisioning 4.8. Security Setting Fuse Provisioning 4.9. AES Root Key Provisioning 4.10. Converting Owner Root Key, AES Root Key Certificates, and Fuse files to Jam STAPL File Formats
4.3. Authentication Root Key Provisioning x
4.3.1. Partial Reconfiguration Multi-Authority Root Key Programming
4.9. AES Root Key Provisioning x
4.9.1. AES Root Key Compact Certificate 4.9.2. Intrinsic ID® PUF AES Root Key Provisioning 4.9.3. Black Key Provisioning
4.9.2. Intrinsic ID® PUF AES Root Key Provisioning x
4.9.2.1. Intrinsic ID PUF Enrollment 4.9.2.2. Wrapping the AES Root Key 4.9.2.3. Programming Helper Data and Wrapped Key to QSPI Flash Memory 4.9.2.4. Querying Intrinsic ID PUF Activation Status 4.9.2.5. Location of the PUF in Flash Memory
4.9.3. Black Key Provisioning x
4.9.3.1. Black Key Provisioning Options
5. Advanced Features x
5.1. Secure Debug Authorization 5.2. HPS Debug Certificates 5.3. Platform Attestation 5.4. Physical Anti-Tamper 5.5. Using Design Security Features with Remote System Update 5.6. SDM Cryptographic Services
5.4. Physical Anti-Tamper x
5.4.1. Anti-Tamper Responses 5.4.2. Anti-Tamper Detection 5.4.3. Anti-Tamper Lite Intel® FPGA IP
5.4.3. Anti-Tamper Lite Intel® FPGA IP x
5.4.3.1. Release Information
5.6. SDM Cryptographic Services x
5.6.1. Vendor Authorized Boot 5.6.2. Secure Data Object Service 5.6.3. SDM Cryptographic Primitive Services
1. Intel® Agilex® Device Security Overview
2. Authentication and Authorization
3. AES Bitstream Encryption
4. Device Provisioning
5. Advanced Features
6. Intel® Agilex™ Device Security User Guide Archives
7. Revision History for the Intel® Agilex® Device Security User Guide

4.8. Security Setting Fuse Provisioning

You use the Intel® Quartus® Prime Programmer to examine device security setting fuses and write them to a text-based .fuse file.

The .fuse file contains a list of fuse name-value pairs. The value specifies whether a fuse has been blown or the contents of the fuse field.

The following example shows the format of the .fuse file. 
# Co-signed firmware                       = "Not blown"
# Device Permit Kill                       = "Not blown"
# Device not secure                        = "Not blown"
# Disable HPS debug                        = "Not blown"
# Disable Intrinsic ID PUF enrollment      = "Not blown"
# Disable JTAG                             = "Not blown"
# Disable PUF-wrapped encryption key       = "Not blown"
# Disable owner encryption key in BBRAM    = "Not blown"
# Disable owner encryption key in eFuses   = "Not blown"
# Disable owner root public key hash 0     = "Not blown"
# Disable owner root public key hash 1     = "Not blown"
# Disable owner root public key hash 2     = "Not blown"
# Disable virtual eFuses                   = "Not blown"
# Force SDM clock to internal oscillator   = "Not blown"
# Force encryption key update              = "Not blown"
# Intel explicit key cancellation          = "0"
# Lock security eFuses                     = "Not blown"
# Owner encryption key program done        = "Not blown"
# Owner encryption key program start       = "Not blown"
# Owner explicit key cancellation 0        = ""
# Owner explicit key cancellation 1        = ""
# Owner explicit key cancellation 2        = ""
# Owner fuses                              = 
 "0x00000000000000000000000000000000000000000000000000000
    00000000000000000000000000000000000000000000000000000
    0000000000000000000000"
# Owner root public key hash 0             = 
 "0x00000000000000000000000000000000000000000000000000000
    0000000000000000000000000000000000000000000"
# Owner root public key hash 1             = 
 "0x00000000000000000000000000000000000000000000000000000
    0000000000000000000000000000000000000000000"
# Owner root public key hash 2             = 
 "0x00000000000000000000000000000000000000000000000000000
    0000000000000000000000000000000000000000000"
# Owner root public key size               = "None"
# PTS counter                              = "0"
# PTS counter base                         = "0"
# QSPI start up delay                      = "10ms"
# RMA Counter                              = "0"
# SDMIO0 is I2C                            = "Not blown"
# SVN counter A                            = "0"
# SVN counter B                            = "0"
# SVN counter C                            = "0"
# SVN counter D                            = "0"
You modify the .fuse file to set the desired security setting fuses. A line that begins with # is treated as a comment line. To program a security setting fuse, you must remove the leading # and set the value to Blown. For example, to enable the Co-signed Firmware security setting fuse, you modify the first line of the fuse file to the following: 
Co-signed firmware = "Blown"

You may also allocate and program the Owner Fuses according to your requirements.

The following fields are not writable through the .fuse file method; however, they are included during the examine operation output for verification:
  • Device not secure
  • Device permit kill
  • Disable owner root public key hash 0
  • Disable owner root public key hash 1
  • Disable owner root public key hash 2
  • Intel key cancellation
  • Owner encryption key program start
  • Owner encryption key program done
  • Owner key cancellation
  • Owner public key hash
  • Owner public key size
  • Owner root public key hash 0
  • Owner root public key hash 1
  • Owner root public key hash 2
  • PTS counter
  • PTS counter base
  • QSPI start up delay
  • RMA counter
  • SDMIO0 is I2C
  • SVN counter A
  • SVN counter B
  • SVN counter C
  • SVN counter D
You use the Intel® Quartus® Prime Programmer to program the .fuse file back to the device. If you add the i option, the Programmer automatically loads the provision firmware to program the security setting fuses. 
//For physical (non-volatile) eFuses 
quartus_pgm -c 1 -m jtag -o "pi;programming_file.fuse" --non_volatile_key
//For virtual (volatile) eFuses 
quartus_pgm -c 1 -m jtag -o "pi;programming_file.fuse"
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