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1. Agilex® 7 JTAG BST Overview
2. Agilex® 7 JTAG BST Architecture
3. Agilex® 7 BST Operation Control
4. Agilex® 7 I/O Voltage for JTAG Operation
5. Enabling and Disabling Agilex® 7 BST Circuitry
6. Agilex® 7 BST Guidelines
7. Document Revision History for the Agilex® 7 JTAG Boundary-Scan Testing User Guide
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2.2. JTAG Pins
Pin | Function | Description |
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TDI | Serial input pin for:
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TDO | Serial output pin for:
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TMS | Input pin that provides the control signal to determine the transitions of the TAP controller state machine. |
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TCK | The clock input to the BST circuitry. | — |