Intel® Agilex™ JTAG Boundary-Scan Testing User Guide

ID 683748
Date 4/21/2022
Public

1. Intel® Agilex™ JTAG BST Overview

Intel® Agilex™ devices support IEEE Std. 1149.1 BST and IEEE Std. 1149.6 BST. When you perform Boundary-Scan Test (BST), you can test pin connections without using physical test probes and capture functional data during normal operation. The boundary-scan cells (BSCs) in a device can force signals onto pins, or capture data from pin or core logic signals. Forced test data is serially shifted into the BSCs. Captured data is serially shifted out and externally compared to expected results.

Intel® Agilex™ devices are implemented using multiple die inside the package, connected together using EMIB (Embedded Multi-die Interconnect Bridge) technology. The multiple die implementation is transparent to BST. There is a single boundary-scan chain for the complete device that includes every die inside the package.

You can perform BST on Intel® Agilex™ devices before, after, and during configuration.

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