Nios® V Processor Reference Manual

ID 683632
Date 8/01/2022

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

2.3.1. General-Purpose Register File

Nios® V/m processor implementation supports a flat register file. The register file contains thirty-two 32-bit general-purpose integer registers. Nios® V/m processor implements the general-purpose register using M20K memories, which do not support two read ports. Hence, Nios® V/m processor duplicates the register files so that two different source registers for an instruction are available in a single cycle. After performing ALU operations, the processor core writes the same result to the destination register in both memories.

Did you find the information on this page useful?

Characters remaining:

Feedback Message