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2.1. I/O Standards and Voltage Levels in Intel® Stratix® 10 Devices
2.2. I/O Element Structure in Intel® Stratix® 10 Devices
2.3. Programmable IOE Features in Intel® Stratix® 10 Devices
2.4. On-Chip I/O Termination in Intel® Stratix® 10 Devices
2.5. External I/O Termination for Intel® Stratix® 10 Devices
3.1. Guideline: VREF Sources and VREF Pins
3.2. Guideline: Observe Device Absolute Maximum Rating for 3.0 V Interfacing
3.3. Guideline: Voltage-Referenced and Non-Voltage Referenced I/O Standards
3.4. Guideline: Do Not Drive I/O Pins During Power Sequencing
3.5. Guideline: Intel® Stratix® 10 I/O Buffer During Power Up, Configuration, and Power Down
3.6. Guideline: Maximum DC Current Restrictions
3.7. Guideline: Use Only One Voltage for All 3 V I/O Banks
3.8. Guideline: I/O Standards Limitation for Intel® Stratix® 10 TX 400
3.9. Guideline: I/O Standards Limitation for Intel® Stratix® 10 GX 400 and SX 400
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2.1.2. Intel® Stratix® 10 I/O Standards Voltage Support
Intel® Stratix® 10 devices in all packages can interface with systems of different supply voltages.
- The I/O buffers are powered by VCC, VCCPT and VCCIO.
- Each I/O bank has its own VCCIO supply and supports only one VCCIO voltage.
- In all LVDS I/O banks, you can use any of the listed VCCIO voltages except 2.5 V, 3.0 V, and 3.3 V. However, LVDS I/O bank 3D of the HF35 package of the Intel® Stratix® 10 GX 400 and SX 400 devices supports only 1.8 V VCCIO.
- The 2.5 V and 3.0 V VCCIO voltages are supported only on the 3 V I/O banks.
- The 3.3 V VCCIO voltages are supported only on I/O bank 3C of the HF35 package of the Intel® Stratix® 10 GX 400 and SX 400 devices. I/O bank 3C of these devices also supports 3.0 V.
- For the maximum and minimum input voltages allowed, refer to the device datasheet.
I/O Standard | VCCIO(V) | VCCPT(V) (Pre-Driver Voltage) |
VREF(V) (Input Ref Voltage) |
VTT(V) (Board Termination Voltage) |
|
---|---|---|---|---|---|
Input8 | Output | ||||
3.3 V LVTTL/3.3 V LVCMOS 9 | 3.3 | 3.3 | 1.8 | — | — |
3.0 V LVTTL/3.0 V LVCMOS | 3.0 | 3.0 | 1.8 | — | — |
2.5 V LVCMOS | 3.0/2.5 | 2.5 | 1.8 | — | — |
1.8 V LVCMOS | 1.8 | 1.8 | 1.8 | — | — |
1.5 V LVCMOS | 1.5 | 1.5 | 1.8 | — | — |
1.2 V LVCMOS | 1.2 | 1.2 | 1.8 | — | — |
SSTL-18 Class I and Class II | VCCPT | 1.8 | 1.8 | 0.9 | 0.9 |
SSTL-15 Class I and Class II | VCCPT | 1.5 | 1.8 | 0.75 | 0.75 |
SSTL-15 | VCCPT | 1.5 | 1.8 | 0.75 | 0.75 |
SSTL-135 | VCCPT | 1.35 | 1.8 | 0.675 | 0.675 |
SSTL-125 | VCCPT | 1.25 | 1.8 | 0.625 | 0.625 |
SSTL-12 | VCCPT | 1.2 | 1.8 | 0.6 | 0.6 |
POD12 | VCCPT | 1.2 | 1.8 | 0.84 | 1.2 |
1.8 V HSTL Class I and Class II | VCCPT | 1.8 | 1.8 | 0.9 | 0.9 |
1.5 V HSTL Class I and Class II | VCCPT | 1.5 | 1.8 | 0.75 | 0.75 |
1.2 V HSTL Class I and Class II | VCCPT | 1.2 | 1.8 | 0.6 | 0.6 |
HSUL-12 | VCCPT | 1.2 | 1.8 | 0.6 | — |
Differential SSTL-18 Class I and Class II | VCCPT | 1.8 | 1.8 | — | 0.9 |
Differential SSTL-15 Class I and Class II | VCCPT | 1.5 | 1.8 | — | 0.75 |
Differential SSTL-15 | VCCPT | 1.5 | 1.8 | — | 0.75 |
Differential SSTL-135 | VCCPT | 1.35 | 1.8 | — | 0.675 |
Differential SSTL-125 | VCCPT | 1.25 | 1.8 | — | 0.625 |
Differential SSTL-12 | VCCPT | 1.2 | 1.8 | — | 0.6 |
Differential POD12 | VCCPT | 1.2 | 1.8 | — | 1.2 |
Differential 1.8 V HSTL Class I and Class II | VCCPT | 1.8 | 1.8 | — | 0.9 |
Differential 1.5 V HSTL Class I and Class II | VCCPT | 1.5 | 1.8 | — | 0.75 |
Differential 1.2 V HSTL Class I and Class II | VCCPT | 1.2 | 1.8 | — | 0.6 |
Differential HSUL-12 | VCCPT | 1.2 | 1.8 | — | — |
LVDS 10 | VCCPT | 1.8 | 1.8 | — | — |
Mini-LVDS 10 | VCCPT | 1.8 | 1.8 | — | — |
RSDS10 | VCCPT | 1.8 | 1.8 | — | — |
LVPECL (Differential clock input only) | VCCPT | — | 1.8 | — | — |
8 Input for the SSTL, HSTL, Differential SSTL, Differential HSTL, POD, Differential POD, LVDS, RSDS, Mini-LVDS, LVPECL, HSUL, and Differential HSUL are powered by VCCPT
9 Available only on I/O bank 3C of the HF35 package of the Intel® Stratix® 10 GX 400 and SX 400 devices.
10 Supported only on dedicated clock pin in I/O banks 3A and 3D of the Intel® Stratix® 10 TX 400, GX 400, and SX 400 devices.