Intel® Stratix® 10 General Purpose I/O User Guide

ID 683518
Date 9/29/2022
Public

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4.3.3.1. Single Data Rate Input Register

Figure 34. Single Data Rate Input Register


Table 21.  Single Data Rate Input Register .sdc Command Examples
Command Command Example Description
create_clock create_clock -name sdr_in_clk -period "100 MHz" sdr_in_clk Creates clock setting for the input clock.
set_input_delay set_input_delay -clock sdr_in_clk 0.15 sdr_in_data Instructs the Timing Analyzer to analyze the timing of the input I/O with a 0.15 ns input delay.