Stratix V Avalon-ST Interface with SR-IOV PCIe Solutions: User Guide

ID 683488
Date 5/02/2016
Public
Document Table of Contents

3.2. SR-IOV System Settings

Parameter

Value

Description

Total Physical Functions (PFs) :

1-2

This core supports 1 or 2 Physical Functions.

Total Physical Function0 Virtual Functions (PF0 VFs):

0-128

Total number of VFs for PF0. From 0-7 PFs are supported when ARI is not supported. From 4–128 VFs are supported when ARI is enabled. If PF1 is enabled, the sum of this field and PF1 VFs should not exceed 128. When ARI is enabled, the number of VFs should be a multiple of 4.

Total Physical Function1 Virtual Functions (PF1 VFs):

0-128

Total number of VFs for PF1. From 0-7 PFs are supported when ARI is not supported. From 4–128 VFs are supported when ARI is enabled. If PF1 is enabled, the sum of this field and PF1 VFs should not exceed 128. When ARI is enabled, the number of VFs should be a multiple of 4.

System Supported Page Size: 4KB - 4MB Specifies the pages sizes supported.
Enable SR-IOV Support

On/Off

Turn this option on to include the SR-IOV functionality.

Enable Alternative Routing-ID (ARI) support

On/Off

This core supports the following configurations:
  • 1 PF and 4-7 VFs with no ARI
  • 1 PF and 4-128 VFs in multiples of 4 with ARI
  • 2 PFs with 4-6 VFs and no ARI
  • 2 PFs with 4-128 VFs in multiples of 4 with ARI
Refer to Section 6.1.3 Alternative Routing-ID Interpretation (ARI) of the PCI Express Base Specification more information about ARI.

Enable Functional Level Reset (FLR)

On/Off

When you turn this option on, each function can be individually reset.

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