2.2.6. Network Interface
The Intel® FPGA PAC N3000-N has two Quad Small Form-Factor Pluggable (QSFP) 28 cages on the faceplate panel.
- 2 x 25 GbE per QSFP28
- 4 X 25 GbE on QSFP A, QSFP B is disabled
- Programmable Forward Error Correction (FEC) including Reed-Solomon Forward Error Correction (RS-FEC), BASE-R FEC (also known as Firecode) and no FEC
Note: Support is provided for IEEE 802.3 clause 108 and clause 74. Clause 91 is not supported.
- Supports 25GBASE-CR and 25GBASE-SR
The Intel® FPGA PAC N3000-N supports Short Reach (SR) optical transceivers and Direct Attached Copper (DAC) cables up to 3m in length. QSFP modules must consume no more than 3.5 watts. The table below lists Ethernet cables, QSFP modules and Ethernet switches known to work with the Intel® FPGA PAC N3000-N. Solution providers must validate Ethernet connectivity for the application.
QSFP28 Loopback Adapter Module, 100 Gb Ethernet, copper
100GBASE-SR4 QSFP28 850nm 100m DOM Transceiver Module
12-Fibers MTP/MPO Female Type 1 OM4 50/125 Multimode Fiber Loopback Module
|QSFP28-to-2xQSFP28 25 GbE copper breakout cable||Mellanox||
5m (16ft) MTP Female 12 Fibers Type B Plenum (OFNP) OM4 (OM3) 50/125 Multimode Elite Trunk Cable
- User configurable pause frame flow control generation
- User configurable maximum packet size up to 9600 bytes
- Per port Ethernet statistics
- Pausing of transmitted traffic in response to received pause frame
You can create FPGA workloads that support these functions, if required.
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