Intel® Quartus® Prime Pro Edition User Guide: Scripting

ID 683432
Date 6/20/2022
Public

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

3.1.33.20. set_clock_groups (::quartus::sdc)

The following table displays information for the set_clock_groups Tcl command:

Tcl Package and Version

Belongs to ::quartus::sdc

Syntax set_clock_groups [-h | -help] [-long_help] [-asynchronous] [-exclusive] -group <names> [-logically_exclusive] [-physically_exclusive]
Arguments -h | -help Short help
-long_help Long help with examples and possible return values
-asynchronous Specify mutually exclusive clocks (such as groups of primary clocks)
-exclusive Specify mutually exclusive clocks (an alias for the -logically_exclusive option). Exists for backwards compatibility.
-group <names> Valid destinations (string patterns are matched using Tcl string matching)
-logically_exclusive Specify logically exclusive clocks (meaning they are not actively used at the same time)
-physically_exclusive Specify physically exclusive clocks (meaning they are not physically present at the same time)
Description
Clock groups provide a quick and convenient way to specify which
clocks are not related.  Asynchronous clocks are those that are
completely unrelated (e.g., have different ideal clock sources).
Logically exclusive clocks are not actively used in the design at
the same time (e.g., multiplexed clocks), but the clock signals may
physically exist on-chip at the same time and therefore may still
influence each other through crosstalk effects.  Physically exclusive
clocks, in contrast, cannot be physically present in the device at
the same time (e.g., multiple clocks defined on the same clock pin).

The Timing Analyzer does not currently analyze crosstalk explicitly.
Instead, the timing models use extra guard bands to account for any
potential crosstalk-induced delays. As a result, the Timing Analyzer
currently treats asynchronous, logically_exclusive, and physically_exclusive
clock groups the same.  However, different parts of the Timing Analyzer may
treat asynchronous and exclusive groups differently. Any commands that are
affected by clock groups will say so in their help text.  But, no
distinction is made between logically and physically exclusive clock groups,
since the only difference between them is how they affect crosstalk.

The result of set_clock_groups is that all clocks in any group are cut
from all clocks in every other group. The use of a single -group option
tells the Timing Analyzer to cut this group of clocks from all other
clocks in the design, including clocks that are created in the future.
This command is similar to calling set_false_path from each clock in every
group to each clock in every other group and vice versa, making
set_clock_groups easier to specify for cutting clock domains.  However,
cutting clocks with set_clock_groups also affects the results of some other
commands.  Any commands that are affected by clock groups will say so in
their help text.
Example Usage
project_open top
create_timing_netlist
create_clock -period 10.000 -name clkA [get_ports sysclk[0]]
create_clock -period 10.000 -name clkB [get_ports sysclk[1]]

# Set clkA and clkB to be mutually exclusive clocks.
set_clock_groups -logically_exclusive -group {clkA} -group {clkB}

# The previous line is equivalent to the following two commands.
set_false_path -from [get_clocks clkA] -to [get_clocks clkB]
set_false_path -from [get_clocks clkB] -to [get_clocks clkA]
Return Value Code Name Code String Return
TCL_OK 0 INFO: Operation successful