Intel® Quartus® Prime Pro Edition User Guide: Scripting

ID 683432
Date 6/20/2022
Public

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3.1.29.9. get_all_assignment_names (::quartus::project)

The following table displays information for the get_all_assignment_names Tcl command:

Tcl Package and Version

Belongs to ::quartus::project

Syntax get_all_assignment_names [-h | -help] [-long_help] [-family <family> ] [-module <all|ip_generate|map|tlg|fit|tan|asm|eda|drc|power|generic> ] [-type <all|global|instance> ]
Arguments -h | -help Short help
-long_help Long help with examples and possible return values
-family <family> Option to filter based on the specified device family. Defaults to all families.
-module <all|ip_generate|map|tlg|fit|tan|asm|eda|drc|power|generic> Option to filter based on the specified flow module. Defaults to all.
-type <all|global|instance> Option to filter based on the specified assignment type. Defaults to all.
Description
Returns a filtered output list of all available, matching
assignment names.

The module option takes one of the following values:

Module           Description
--------         -------------------------------------
ip_generate      IP Generation assignment names
tlg              Support Logic Generation assignment names 
map              Analysis & Synthesis assignment names
fit              Fitter assignment names
asm              Assembler assignment names
eda              EDA Netlist Writer assignment names
drc              Design Assistant assignment names
power            Power Analyzer assignment names
generic          Other assignment names not included in any 
                 of the above flow modules
all              All assignment names
Example Usage
## Print out all available global assignments
foreach i [get_all_assignment_names -type global] {
    puts $i
}

## Print out all available global assignments
## for the Stratix family
foreach i [get_all_assignment_names -type global -family Stratix] {
    puts $i
}

## Print out all available global assignments
## for the Stratix family required
## by the Analysis & Synthesis module
foreach i [get_all_assignment_names -type global -family Stratix -module map] {
    puts $i
}
Return Value Code Name Code String Return
TCL_OK 0 INFO: Operation successful
TCL_OK 0 INFO: Assignment <string> is not supported in this edition of the Quartus Prime software.
TCL_ERROR 1 ERROR: Illegal flow module: <string>. Specify <string>, <string>, <string>, <string>, <string>, <string>, <string>, or <string>.
TCL_ERROR 1 ERROR: Illegal type: <string>. Specify <string>, <string>, or <string>.
TCL_ERROR 1 ERROR: Illegal device family: <string>. Specify a legal device family.