Visible to Intel only — GUID: reference_TCL_tcl_pkg_project_ver_7_0_cmd_get_all_assignment_names
Ixiasoft
Visible to Intel only — GUID: reference_TCL_tcl_pkg_project_ver_7_0_cmd_get_all_assignment_names
Ixiasoft
3.1.24.8. get_all_assignment_names (::quartus::project)
The following table displays information for the get_all_assignment_names Tcl command:
Tcl Package and Version | Belongs to ::quartus::project |
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Syntax | get_all_assignment_names [-h | -help] [-long_help] [-family <family> ] [-module <all|map|fit|tan|asm|eda|drc|generic> ] [-type <all|global|instance> ] | ||
Arguments | -h | -help | Short help | |
-long_help | Long help with examples and possible return values | ||
-family <family> | Option to filter based on the specified device family. Defaults to all families. | ||
-module <all|map|fit|tan|asm|eda|drc|generic> | Option to filter based on the specified flow module. Defaults to all. | ||
-type <all|global|instance> | Option to filter based on the specified assignment type. Defaults to all. | ||
Description | Returns a filtered output list of all available, matching assignment names. The module option takes one of the following values: Module Description -------- ------------------------------------- map Analysis and Synthesis assignment names fit Fitter assignment names asm Assembler assignment names eda EDA Netlist Writer assignment names drc Design Assistant assignment names generic Other assignment names not included in any of the above flow modules all All assignment names |
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Example Usage | |
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Return Value | Code Name | Code | String Return |
TCL_OK | 0 | INFO: Operation successful | |
TCL_OK | 0 | INFO: Assigment <string> is not supported in this edition of the Quartus Prime software. | |
TCL_ERROR | 1 | ERROR: Illegal flow module: <string>. Specify < |