Intel® Quartus® Prime Pro Edition User Guide: Scripting

ID 683432
Date 10/04/2021
Public

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3.1.29.9. enable_ccpp_removal (::quartus::sta)

The following table displays information for the enable_ccpp_removal Tcl command:

Tcl Package and Version

Belongs to ::quartus::sta

Syntax enable_ccpp_removal [-h | -help] [-long_help] [-depth <depth> ] [-off] [-on]
Arguments -h | -help Short help
-long_help Long help with examples and possible return values
-depth <depth> maximum clock tree depth for cppp removal
-off Disable this setting.
-on Enable this setting.
Description

Enables (or disables) common clock path pessimism (CCPP) removal during slack computation. CCPP removal can improve timing results by removing min/max delay differences from common portions of clock paths. Enabling CCPP removal increases the time required to perform timing analysis. When specified, the optional depth parameter limits the clock tree depth used for CCPP removal. This is generally not applicable to FPGA compilations where the clock tree is fixed, but for large designs with potentially deep synthesized clock trees this can reduce outlier run time. When not specified, or when specified with a value of 0, the complete clock tree is used for CCPP removal (i.e. full clock-tree depth).

Example Usage
project_open top
create_timing_netlist
read_sdc

# Report timing without CCPP removal
report_timing

# Enable CCPP removal and re-report timing.
enable_ccpp_removal
report_timing

delete_timing_netlist
project_close
Return Value Code Name Code String Return
TCL_OK 0 INFO: Operation successful
TCL_ERROR 1 ERROR: Timing netlist does not exist. Use create_timing_netlist to create a timing netlist.

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