Data Streams Supported
A PCIe device is reading data from a memory buffer.
A PCIe device is writing data to a memory buffer.
A processor core is reading data from a PCIe endpoint.
A processor core responds to a message signaled interrupt (MSI) generated by a PCIe endpoint. In this guide, the term
message signaled interruptor
MSIis used generically to cover both MSI and MSI-X.
A processor core is writing data to a memory-mapped I/O (MMIO) space region on a PCIe device.