Intel® Time Coordinated Computing Mode (Intel® TCC Mode) Tuning
- Tuning configuration applied Intel® TCC Mode enabled settings. Intel® TCC Mode is required to achieve your latency requirements, but this mode disables most power management so may negatively impact power or best-effort performance.
- Tuning configuration applied Intel® TCC Mode BIOS options using BIOS default settings. Your latency requirements allow for power management options to be enabled with the out-of-the-box configuration that tunes for a balance of power and best-effort performance.
- Tuning configuration disabled power management in addition to the options disabled by Intel® TCC Mode to meet your strict latency requirements, but may negatively impact power or best-effort performance.
- Tuning configuration applied a combination of Intel® TCC Mode BIOS options using BIOS default settings and real-time settings. Your latency requirements can be achieved with settings between the out-of-the-box configuration and Intel® TCC Mode enabled. Some power management may be disabled to tune for real-time latency with minimal impact to power or best-effort performance.
Tuning Modern Standby to Default Configuration
Disabling Modern Standby
Modern Standby is also referred to as the Low Power S0 Idle Capability. S0ix states shut off parts of the processor when they are not in use. When disabled, S0ix states are prohibited.
Tuning C-states to Default Configuration
C-states are the different idle states that processor cores can be in and are meant to save power while the processor or cores are not executing any instructions. When C-states are disabled, cores are prevented from entering low-power states.
Tuning Intel SpeedStep® Technology to Default Configuration
Disabling Intel SpeedStep® Technology
Intel SpeedStep® Technology allows varying core frequency via performance state (P-state) transitions to reduce power. For details, see Intel® SDM Volume 3: System Programming Guide chapter 14 and Advanced Configuration and Power Interface (ACPI) Specification chapter 8.
Tuning Device Power Management States to Default Configuration
Disabling Device Power Management States
Device Power Management States are also referred to by the name ACPI D3Cold Support. Device power states are states of particular devices; as such, they are generally not visible to the user. For example, some devices may be in the Off state even though the system as a whole is in the Working state. For details, see the ACPI Specification section 2.3 and chapter 7.
Tuning Core Power Management to Default Configuration
Disabling Core Power Management
Core Power Management refers to Intel® Turbo Boost Technology 3.0 which uses the principle of leveraging thermal headroom to dynamically increase processor performance for single-threaded and multi-threaded/multi-tasking environments. When Core Power Management is disabled, Intel® Turbo Boost Technology 3.0 is turned off. For details, see Intel® SDM Volume 3: System Programming Guide section 14.3.3.
Tuning Memory Power and Thermal Throttling to Default Configuration
Disabling Memory Power and Thermal Throttling
Memory Power and Thermal Throttling refers to Memory Running Average Power Limit (RAPL) which provides a mechanism to enforce a power consumption limit. For details, see Intel® SDM Volume 3: System Programming Guide section 14.9.
Tuning SA GV to Default Configuration
Disabling SA GV
System Agent Geyserville (SA GV) dynamically scales the work point (V/F) by applying DVFS (Dynamic Voltage Frequency Scaling) based on memory bandwidth utilization and/or the latency requirement of the various workloads for better energy efficiency at the System Agent.
Tuning Memory Power Down Mode to Default Configuration
Disabling Memory Power Down Mode
Memory Power Down Mode is a power management feature used by the memory controller to reduce power consumption by deasserting Clock Enable (CKE) and/or triggering DLL and PLL shutdown. Disabling Memory Power Down Mode configures No Power Down and is recommended for maximum performance.
Tuning Page Close Idle Timeout to Default Configuration
Disabling Page Close Idle Timeout
Page Close Idle Timeout is a power management feature that configures the number of idle clock cycles allowed before the memory controller closes open DRAM pages to precharge them. If Page Close Idle Timeout is disabled, open pages will not be closed until precharging is required.
Tuning Fabric to Default Configuration
Tuning Fabric for Real-Time
Tuning Fabric refers to Fabric Power Management which includes the following features: PSF Local Clock Enable, and PSF Early Exit from Idle Enable. When Tuning Fabric for Real-Time is configured, PSF Local Clock Enable will be disabled, PSF Early Exit from Idle Enable will be enabled. This set of configurations disables local clock gating of the fabric when it is idle in order to reduce I/O latency.
Tuning Render Standby to Default Configuration
Disabling Render Standby
Render Standby adjusts the graphics voltage very low, or very close to zero when the system is asleep. Disabling Render Standby prohibits the GPU from entering low-power state RC6.
Tuning CPU PCIe ASPM to Default Configuration
Disabling CPU PCIe ASPM
Tuning PCH PCIe ASPM to Default Configuration
Disabling PCH PCIe ASPM
PCIe Active State Power Management (ASPM) is an autonomous hardware-based, active state mechanism that enables power savings even when the connected components are in the D0 state. After a period of idle link time, an ASPM Physical-Layer protocol places the idle link into a lower-power state. It is part of the PCI Express Base Specification and can be found on many devices. When enabled, PCIe ASPM can reduce power consumption, but can also increase latency. PCIe ASPM may be configured on the CPU and PCH PCIe root ports.
Tuning PCIe Clock Gating to Default Configuration
Disabling PCIe Clock Gating
Tuning PCH Clock Gating to Default Configuration
Disabling PCH Clock Gating
PCH Power Clock Gating, also referred to as Legacy I/O Low Latency, gates the clock to the PCH. Disabling PCH Power Clock Gating can reduce I/O latency.
Tuning CPU PCIe L1 Substates to Default Configuration
L1 Substates is a power management technology for PCIe devices. The fundamental idea behind L1 substates is to use something other than the high-speed logic inside the PCIe transceivers to wake the devices. The goal is to achieve near zero power consumption with an active state. Similar to other PCIe power management features, L1 Substates can be used to reduce power consumption but can also introduce latency when enabled. PCIe L1 Substates may be configured on the CPU and PCH PCIe root ports.
Tuning DMI Link ASPM to Default Configuration
Disabling DMI Link ASPM
ASPM control for the DMI link.
Tuning DMI Power Management to Default Configuration
Disabling DMI Power Management
DMI Power Management refers to Delay Enable DMI ASPM. Disabling DMI Power Management turns off DMI ASPM to reduce I/O latency.
Tuning Intel® Speed Shift Technology to Default Configuration
Disabling Intel® Speed Shift Technology
Intel® Speed Shift Technology controls frequency transitions through the processor, unlike Intel SpeedStep® Technology which maintains control of P-States through the OS. Disabling Intel® Speed Shift Technology ensures that the processor does not perform frequency transitions which can contribute to increased latency.
11th Gen Intel® Core™ processors and Xeon® W-11000E Series processors only. Intel® Hyper-Threading Technology is a hardware feature that allows more than one thread to run on each core. When disabled, only one thread will be run on each core.
Additional Power Management Tuning
Disabling Clock Gating
Disables clock gating in various functional components including the fabric, PCIe, I/O, DMI, and memory controller.
Disabling Link Power Management
Disabling power management in the DMI link.
Tuning PCH Interconnect
Disabling power management in the OPI, or “On Package DMI interconnect Interface.”
Tuning Fabric to Prioritize Traffic
Configures the interconnect fabric to prioritize read and write traffic between core and memory and/or TC0/TC1 PCIe traffic between PCIe and memory.
Tuning I/O to Deprioritize Competing Traffic
Configures the I/O path to deprioritize competing traffic.
Configuring Credit Settings
Indicates completion of credit exchange in the memory interface.
Tuning Number of Read Request Credits
Tunes the maximum number of read request credits to optimize traffic between I/O and memory.
Tuning Arbiter Traffic
Configures the interconnect fabric to optimize arbitration downstream and upstream of PCIe and DMI.