Release Notes

  • 2021.3.0
  • 10/26/2021
  • Public

Intel® TCC Tools 2021.3.0 Release Notes

Version History/Revision History

These are the main releases of Intel® TCC Tools:
Date
Revision
Description
15 October 2021
2021.3.0
Update release
15 June 2021
2021.2.0
Update release
21 December 2020
2021.1.1
Gold release
30 July 2020
0.11.0
Beta release
27 March 2020
0.10.1
Alpha Update release
18 October 2019
0.9.2
Alpha Update release
6 September 2019
0.9.1
Alpha Update release
19 April 2019
0.8.2
Alpha Update release
02 October 2018
0.7.0
Alpha Update release
06 June 2018
0.5.0
Initial release

Intended Audience

This release notes document is for anyone using Intel® TCC Tools, such as real-time application developers and system engineers.

Customer Support

Contact your Intel representative for support or submit an issue to http://premiersupport.intel.com.
Visit the Intel® TCC forum for access to expert advice and answers: https://community.intel.com/t5/Real-Time/ct-p/real-time

Introduction

Intel® TCC Tools is a collection of C language APIs, tools, sample applications, and supporting documentation that enable you to take advantage of real-time features on selected Intel processors.
This document provides system requirements, installation instructions, issues and limitations, and legal information.
To learn more about this product, see:

Features in This Release

New Features from 2021.2.0
  • Data streams optimizer (DSO):
    • Added new DSO tuning configurations for Intel Atom® x6000E Series processors and 11th Gen Intel® Core™ processors which enable better real-time performance.
    • Added “Reset tuning” option to DSO which allows to return system to the initial state.
  • Real-Time readiness checker:
    • Added Linux* kernel boot options check (Linux version).
    • Added GT CLOS check.
    • Added SMI check (EFI version).
  • Added support for Intel® Xeon® W-11000E Series processors for all Intel® TCC Tools features.
  • Added support of Slim Bootloader for all Intel® TCC Tools features, except Real-time communication demo.
  • Extended Time GPIO samples on Intel Atom® x6000E Series processors with PSE TGPIO device support.
Changes to Existing Features from 2021.2.0
  • Data streams optimizer and cache configurator: updated target connection settings and scripts to make them easily extendable for use with virtual machines where hypervisors support Intel® TCC features.
Unsupported or Discontinued Features
Nothing to report.

Fixed Issues

The following issues reported in the previous release were fixed in this release:
  • Data streams optimizer: Due to current firmware limitations on Intel Atom® x6000E Series processors, you may observe latency spikes of more than 10 microseconds for transactions passing through the processor. As a result, the performance evaluation of tuning configurations should be limited to a reduction in average latency until the updated firmware is applied.
  • This release fully supports 4-core processors. Support of 2-core processors is limited.
    • Cache allocation samples can now be executed on a selected core (for example, Core 1) without code changes.
  • Cache allocation:
    • On Intel Atom® x6000E Series processors with the PR1 release of the Yocto Project*-based BSP, the cache allocation library may fail to allocate memory when the buffer_size_bytes value in
      tcc.config
      is increased between runs of the application calling the cache allocation library.
      This issue is fixed in the MR1 release of the Yocto Project*-based BSP for Intel Atom® x6000E Series processors. PR1 release is still affected.
    • Software SRAM is not functional on Intel® Xeon® W-11555MRE/MLE processors and should not be used for performance measurements.
    • The performance of software SRAM buffers on Intel® Xeon® W-11155MRE/MLE processors works only on configurations that use an even number of cache ways in the L3 cache. Recommendation is to ensure an even number of L3 cache ways are reserved for software SRAM buffers – 2-ways, 4-ways, 6-ways, etc. Do not use presets as they use 1 L3 cache way.
    • On Intel Atom® x6000E Series processors with the PR1 release of the Yocto Project*-based BSP, the cache configurator may report that the applied configuration is different from expected after reboot, if a software SRAM buffer in L2 cache was added.
      This issue is fixed in the MR1 release of the Yocto Project*-based BSP for Intel Atom® x6000E Series processors. PR1 release is still affected.
    • The default single L3 cache way software SRAM buffer is not generated by the BIOS when the cache configurator is used to remove all existing software SRAM buffers and the software SRAM option in BIOS is enabled.
      This issue is fixed for 11th Gen Intel® Core™ processors and Intel® Xeon® W-11555MRE/MLE processors.
  • On Intel Atom® x6000E Series processors with the PR1 release of the Yocto Project*-based BSP, Time-Aware GPIO and Ethernet cross-timestamp samples do not work with a hypervisor or the real-time configuration manager (RTCM) enabled.
    This issue is fixed in the MR1 release of the Yocto Project*-based BSP for Intel Atom® x6000E Series processors. PR1 release is still affected.

Known Issues

  • PR1 and MR1 releases of the Yocto Project*-based BSP for Intel Atom® x6000E Series processors contain only SEP5 IFWI which does not allow disabling of Intel® TCC Authentication or enrollment of personal authentication keys. Due to this limitation, Intel® TCC Tools’ features that require authentication, such as data streams optimizer and cache configurator, cannot be used with SEP5 IFWI. To use these features, user should change IFWI configuration to SEP0 and reflash IFWI onto the reference validation platform with supported Intel Atom® x6000E Series processor.
  • After using the
    tcc_setup.py
    script to install files on the target system, the
    /usr/share/tcc_tools/tools
    directory has only write permissions for
    Group
    and
    Other
    owners. You can only access the files in this folder with the account that was used to run the
    tcc_setup.py
    script.
  • Data streams optimizer:
    • In rare cases, the
      tcc_data_streams_optimizer_preprod
      tool may not be able to write files into the output directory. Change the umask to 0755 or set the permission to the output directory manually.
    • On 11th Gen Intel® Core™ processors, a system hang may occur intermittently when running the
      reboot
      command. If the system detects hardware errors, the Functional Safety (FuSa) feature, PCIe* Interrupt Error Handling (IEH), may attempt an additional system reset that can get stuck at postcode 0x0b7f. Perform a hard reset to regain control of the system. Temporary resolution for system hang after reboot: Disable IEH in the BIOS menu: Intel Advanced Menu/PCH-IO Configuration/IEH Mode = Bypass Mode.
    • On Intel® Xeon® W-11000E Series processors, if the producer or consumer device is attached to the root port 0:01.0, data streams optimizer fails to find any tuning configurations. As a workaround, you can specify 0:1c.0 as the producer or consumer, in the requirements file.
  • Measurement library: Applications using the measurement library may not read all collected values from the shared memory.
  • Cache allocation:
    • The cache configurator and cache allocation library work incorrectly with Intel® Hyper-Threading Technology enabled. The cache configurator may generate the wrong content for BIOS capsules. The resulting configuration may be different from expected or may cause unexpected system issues.
    • On 11th Gen Intel® Core™ processors and Intel Atom® x6000E Series processors, VTune™ Profiler may cause a system hang during the cache allocation sample measurement when RTCM is enabled.
    • On Intel Atom® x6000E Series processors, the default single L3 cache way software SRAM buffer is not generated by the BIOS when the cache configurator is used to remove all existing software SRAM buffers and when the software SRAM option in BIOS is enabled.
    • On 11th Gen Intel® Core™ processors and Intel® Xeon® W-11000E Series processors with Slim Bootloader, cache configurator creates software SRAM regions for the wrong cores when preset is applied. Manual creation of software SRAM regions works correctly.
    • Cache configurator shows the incorrect maximum size for allocation of the software SRAM region. The actual maximum size is less than the reported by one cache way size.
  • Real-time readiness checker always reports that the current boot is not RTCM for systems with BIOS.
  • Time-Aware GPIO:
    • On 11th Gen Intel® Core™ processors, Intel® Xeon® W-11000E Series processors, and Intel Atom® x6000E Series processors with Intel® Programmable Services Engine (Intel® PSE) TGPIO device, the frequency discipline sample does not produce the expected output.
    • On Intel Atom® x6000E Series processors with Slim Bootloader, Time-Aware GPIO is unavailable.
  • Real-time communication demo:
    • Running in SISO-single or basic mode sometimes does not correctly configure IP addresses during the setup phase. Best-effort traffic is not generated.
    • At least one message is always lost.
    • On 11th Gen Intel® Core™ processors and Intel® Xeon® W-11000E Series processors with BSP based on Linux* kernel 5.10, basic mode with XDP ZC optimization has high packet loss statistics. Also, SISO-single mode with XDP ZC optimization does not work.
  • Certain features detect the processor model of the target system. These features may report errors when they detect processors that have CPUID 0000.
    • If the real-time readiness checker reports NON_RT_READY in this case, you can proceed with using Intel® TCC Tools.
    • If
      tcc_setup_ssram.sh
      reports an error, specify the platform in the command line.
    • If data streams optimizer reports an error, specify the platform in the environment file. Cache configurator is unsupported in this case.

Limitations

  • The cache configurator requires binary compatibility with real-time configuration data (RTCD) at the BIOS level. If a BIOS update changes the RTCD binary structure, it may cause issues with cache configurator. For a list of supported BIOS versions, see BIOS/Firmware Version.
  • If an application accesses the L2 software SRAM buffer and is subsequently migrated to a different core which does not share the same L2 cache, and continues to access the L2 software SRAM buffer, the performance of the software SRAM may diminish.

Integrating Cache Reservation Library

Integrating the Cache Reservation Library (CRL) is necessary to enable Intel® TCC on your Intel® platform. For information on which version of the Cache Reservation Library (CRL) you need for your Intel® platform, see Cache Reservation Library (CRL) Integration for Intel® Platforms to Enable Intel® TCC .

Where to Find the Release

You can find the release on the product page.

Release Content

The following table shows revision numbers of components of the Intel® TCC Tools release.
Subproject (component)
Location
Revision
Build Date
Intel® TCC Tools standalone installer
l_tcc_tools_p_2021.3.0.451_offline.sh
2021.3.0
14 October 2021
Intel® TCC Tools target files
[installdir]/target/tcc_tools_target_2021.3.0.tar.gz
2021.3.0
14 October 2021

Hardware and Software Compatibility

This release is compatible with the following hardware:
  • 11th Gen Intel® Core™ processors DDR4 customer reference board with a supported processor:
    • 11th Gen Intel® Core™ i3-1115GRE Processor
    • 11th Gen Intel® Core™ i5-1145GRE Processor
    • 11th Gen Intel® Core™ i7-1185GRE Processor
  • Intel Atom® x6000E Series processors reference validation platform with a supported processor:
    • Intel Atom® x6200FE Processor
    • Intel Atom® x6212RE Processor
    • Intel Atom® x6414RE Processor
    • Intel Atom® x6425RE Processor
    • Intel Atom® x6427FE Processor
  • Intel® Xeon® W-11000E Series processors reference validation platform with a supported processor:
    • Intel® Xeon® W-11865MRE Processor
    • Intel® Xeon® W-11865MLE Processor
    • Intel® Xeon® W-11555MRE Processor
    • Intel® Xeon® W-11555MLE Processor
    • Intel® Xeon® W-11155MRE Processor
    • Intel® Xeon® W-11155MLE Processor
To acquire these boards, contact your Intel representative.
For additional requirements, see the Get Started Guide.
BIOS/Firmware Version
  • For 11th Gen Intel® Core™ processors, Intel has validated this release with version TGLIFUI1.R00.4304.A01.2107290604. IFWI version: v4315_01
  • For Intel Atom® x6000E Series processors, Intel has validated this release with version EHLSFWI1.R00.3273.A04.2107240322. IFWI version: v3312.01
  • For Intel® Xeon® W-11000E Series processors, Intel has validated this release with version TGLIFUI1.R00.4304.A02.2108190710. IFWI version: v4345_01
SBL IFWI:
  • For 11th Gen Intel® Core™ processors, Intel has validated this release with version SB_TGL.001.001.000.001.002.01071.D-628D4ED8A6AA1807-dirty.
  • For Intel Atom® x6000E Series processors, Intel has validated this release with version SB_EHL.001.001.000.002.000.01077.D-748AEB0EAF509189-dirty.
  • For Intel® Xeon® W-11000E Series processors, Intel has validated this release with version SB_TGL.001.000.005.001.003.01205.D-0000000000000000-dirty.
Supported Operating Systems
This release supports the Linux* operating systems.
Validated operating systems:
  • Host: Ubuntu* 20.04 LTS
  • Target: Yocto Project*-based board support package releases:
    • 11th Gen Intel® Core™ Processors MR3 release
    • Intel Atom® x6000E Series Processors MR1 release
    • Intel® Xeon® W-11000E Series Processors MR1 release
  • Target: Windows* 10 OS for Data Streams Optimizer (DSO) only.

Notices and Disclaimers

You may not use or facilitate the use of this document in connection with any infringement or other legal analysis concerning Intel products described herein. You agree to grant Intel a non-exclusive, royalty-free license to any patent claim thereafter drafted which includes subject matter disclosed herein.
No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document.
All product plans and roadmaps are subject to change without notice.
The products described may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request.
Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.
Intel technologies may require enabled hardware, software or service activation.
No product or component can be absolutely secure.
Your costs and results may vary.
Code names are used by Intel to identify products, technologies, or services that are in development and not publicly available. These are not “commercial” names and not intended to function as trademarks.
Performance varies by use, configuration and other factors. Learn more at www.Intel.com/PerformanceIndex.
© Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others.
This software and the related documents are Intel copyrighted materials, and your use of them is governed by the express license under which they were provided to you (License). Unless the License provides otherwise, you may not use, modify, copy, publish, distribute, disclose or transmit this software or the related documents without Intel’s prior written permission.
This software and the related documents are provided as is, with no express or implied warranties, other than those that are expressly stated in the License.

Product and Performance Information

1

Performance varies by use, configuration and other factors. Learn more at www.Intel.com/PerformanceIndex.