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  • Brand Name: Core i7

  • Product Number: i7-12700KF

  • Ordering Code: CM8071504553829

  • SPEC Code: SRL4P

  • Code Name: Alder Lake

Stratix® V 5SGSD3 FPGA

Specifications

Export specifications

Essentials

I/O Specifications

Package Specifications

Supplemental Information

Ordering and Compliance

Ordering and spec information

Stratix® V 5SGSD3 FPGA 5SGSMD3E1H29I2G

  • MM# 999XH4
  • Spec Code SRHE1
  • Ordering Code 5SGSMD3E1H29I2G
  • Stepping A1
  • MDDS Content IDs 698717

Stratix® V 5SGSD3 FPGA 5SGSMD3E2H29C3G

  • MM# 999XH5
  • Spec Code SRHE2
  • Ordering Code 5SGSMD3E2H29C3G
  • Stepping A1
  • MDDS Content IDs 699130

Stratix® V 5SGSD3 FPGA 5SGSMD3E2H29I3G

  • MM# 999XH6
  • Spec Code SRHE3
  • Ordering Code 5SGSMD3E2H29I3G
  • Stepping A1
  • MDDS Content IDs 695093

Stratix® V 5SGSD3 FPGA 5SGSMD3E2H29C2G

  • MM# 999XHL
  • Spec Code SRHEE
  • Ordering Code 5SGSMD3E2H29C2G
  • Stepping A1
  • MDDS Content IDs 694037

Stratix® V 5SGSD3 FPGA 5SGSMD3E2H29I2G

  • MM# 999XHN
  • Spec Code SRHEF
  • Ordering Code 5SGSMD3E2H29I2G
  • Stepping A1
  • MDDS Content IDs 699187

Stratix® V 5SGSD3 FPGA 5SGSMD3E3H29C2G

  • MM# 999XHR
  • Spec Code SRHEG
  • Ordering Code 5SGSMD3E3H29C2G
  • Stepping A1
  • MDDS Content IDs 697841

Stratix® V 5SGSD3 FPGA 5SGSMD3H1F35C2LG

  • MM# 999XHT
  • Spec Code SRHEH
  • Ordering Code 5SGSMD3H1F35C2LG
  • Stepping A1
  • MDDS Content IDs 725274

Stratix® V 5SGSD3 FPGA 5SGSMD3H3F35I3G

  • MM# 999XHV
  • Spec Code SRHEJ
  • Ordering Code 5SGSMD3H3F35I3G
  • Stepping A1
  • MDDS Content IDs 724878

Stratix® V 5SGSD3 FPGA 5SGSMD3H3F35I3LG

  • MM# 999XHW
  • Spec Code SRHEK
  • Ordering Code 5SGSMD3H3F35I3LG
  • Stepping A1
  • MDDS Content IDs 725774

Stratix® V 5SGSD3 FPGA 5SGSMD3H3F35I4G

  • MM# 999XHX
  • Spec Code SRHEL
  • Ordering Code 5SGSMD3H3F35I4G
  • Stepping A1
  • MDDS Content IDs 725315

Stratix® V 5SGSD3 FPGA 5SGSMD3E3H29I3G

  • MM# 999XJD
  • Spec Code SRHEY
  • Ordering Code 5SGSMD3E3H29I3G
  • Stepping A1
  • MDDS Content IDs 699843

Stratix® V 5SGSD3 FPGA 5SGSMD3H1F35C1G

  • MM# 999XJF
  • Spec Code SRHEZ
  • Ordering Code 5SGSMD3H1F35C1G
  • Stepping A1
  • MDDS Content IDs 725790

Stratix® V 5SGSD3 FPGA 5SGSMD3H1F35C2G

  • MM# 999XJG
  • Spec Code SRHF0
  • Ordering Code 5SGSMD3H1F35C2G
  • Stepping A1
  • MDDS Content IDs 726323

Stratix® V 5SGSD3 FPGA 5SGSMD3H2F35C1G

  • MM# 999XJH
  • Spec Code SRHF1
  • Ordering Code 5SGSMD3H2F35C1G
  • Stepping A1
  • MDDS Content IDs 725819

Stratix® V 5SGSD3 FPGA 5SGSMD3H2F35I3G

  • MM# 999XJJ
  • Spec Code SRHF2
  • Ordering Code 5SGSMD3H2F35I3G
  • Stepping A1
  • MDDS Content IDs 726190

Stratix® V 5SGSD3 FPGA 5SGSMD3E1H29C1G

  • MM# 999XJR
  • Spec Code SRHF7
  • Ordering Code 5SGSMD3E1H29C1G
  • Stepping A1
  • MDDS Content IDs 697086

Stratix® V 5SGSD3 FPGA 5SGSMD3E3H29C3G

  • MM# 999XJX
  • Spec Code SRHFB
  • Ordering Code 5SGSMD3E3H29C3G
  • Stepping A1
  • MDDS Content IDs 694679

Stratix® V 5SGSD3 FPGA 5SGSMD3E3H29I4G

  • MM# 999XK0
  • Spec Code SRHFD
  • Ordering Code 5SGSMD3E3H29I4G
  • Stepping A1
  • MDDS Content IDs 699684

Stratix® V 5SGSD3 FPGA 5SGSMD3E1H29C2G

  • MM# 999XK1
  • Spec Code SRHFE
  • Ordering Code 5SGSMD3E1H29C2G
  • Stepping A1
  • MDDS Content IDs 694668

Stratix® V 5SGSD3 FPGA 5SGSMD3E2H29C1G

  • MM# 999XK3
  • Spec Code SRHFF
  • Ordering Code 5SGSMD3E2H29C1G
  • Stepping A1
  • MDDS Content IDs 695144

Stratix® V 5SGSD3 FPGA 5SGSMD3E3H29C4G

  • MM# 999XK5
  • Spec Code SRHFH
  • Ordering Code 5SGSMD3E3H29C4G
  • Stepping A1
  • MDDS Content IDs 700467

Stratix® V 5SGSD3 FPGA 5SGSMD3H2F35C2LG

  • MM# 999XK6
  • Spec Code SRHFJ
  • Ordering Code 5SGSMD3H2F35C2LG
  • Stepping A1
  • MDDS Content IDs 724848

Stratix® V 5SGSD3 FPGA 5SGSMD3H2F35C3G

  • MM# 999XKK
  • Spec Code SRHFU
  • Ordering Code 5SGSMD3H2F35C3G
  • Stepping A1
  • MDDS Content IDs 724866

Stratix® V 5SGSD3 FPGA 5SGSMD3H2F35I2G

  • MM# 999XKL
  • Spec Code SRHFV
  • Ordering Code 5SGSMD3H2F35I2G
  • Stepping A1
  • MDDS Content IDs 724925

Stratix® V 5SGSD3 FPGA 5SGSMD3H2F35I3LG

  • MM# 999XKM
  • Spec Code SRHFW
  • Ordering Code 5SGSMD3H2F35I3LG
  • Stepping A1
  • MDDS Content IDs 726238

Stratix® V 5SGSD3 FPGA 5SGSMD3H3F35C2G

  • MM# 999XKN
  • Spec Code SRHFX
  • Ordering Code 5SGSMD3H3F35C2G
  • Stepping A1
  • MDDS Content IDs 726074

Stratix® V 5SGSD3 FPGA 5SGSMD3H1F35I2G

  • MM# 999XKZ
  • Spec Code SRHG3
  • Ordering Code 5SGSMD3H1F35I2G
  • Stepping A1
  • MDDS Content IDs 725358

Stratix® V 5SGSD3 FPGA 5SGSMD3H2F35C2G

  • MM# 999XL0
  • Spec Code SRHG4
  • Ordering Code 5SGSMD3H2F35C2G
  • Stepping A1
  • MDDS Content IDs 725489

Stratix® V 5SGSD3 FPGA 5SGSMD3H2F35I2LG

  • MM# 999XL1
  • Spec Code SRHG5
  • Ordering Code 5SGSMD3H2F35I2LG
  • Stepping A1
  • MDDS Content IDs 725348

Stratix® V 5SGSD3 FPGA 5SGSMD3H3F35C2LG

  • MM# 999XL2
  • Spec Code SRHG6
  • Ordering Code 5SGSMD3H3F35C2LG
  • Stepping A1
  • MDDS Content IDs 725672

Stratix® V 5SGSD3 FPGA 5SGSMD3H3F35C3G

  • MM# 999XL3
  • Spec Code SRHG7
  • Ordering Code 5SGSMD3H3F35C3G
  • Stepping A1
  • MDDS Content IDs 725877

Stratix® V 5SGSD3 FPGA 5SGSMD3H3F35C4G

  • MM# 999XL4
  • Spec Code SRHG8
  • Ordering Code 5SGSMD3H3F35C4G
  • Stepping A1
  • MDDS Content IDs 726281

Retired and discontinued

Stratix® V 5SGSD3 FPGA 5SGSMD3E1H29C2N

  • MM# 969565
  • Spec Code SR80F
  • Ordering Code 5SGSMD3E1H29C2N
  • Stepping A1
  • MDDS Content IDs 700496

Stratix® V 5SGSD3 FPGA 5SGSMD3E2H29C2LN

  • MM# 969566
  • Spec Code SR80G
  • Ordering Code 5SGSMD3E2H29C2LN
  • Stepping A1
  • MDDS Content IDs 696601

Stratix® V 5SGSD3 FPGA 5SGSMD3E2H29I2LN

  • MM# 969567
  • Spec Code SR80H
  • Ordering Code 5SGSMD3E2H29I2LN
  • Stepping A1
  • MDDS Content IDs 692336

Stratix® V 5SGSD3 FPGA 5SGSMD3E2H29I3N

  • MM# 969568
  • Spec Code SR80J
  • Ordering Code 5SGSMD3E2H29I3N
  • Stepping A1
  • MDDS Content IDs 701664

Stratix® V 5SGSD3 FPGA 5SGSMD3E3H29C3N

  • MM# 969570
  • Spec Code SR80L
  • Ordering Code 5SGSMD3E3H29C3N
  • Stepping A1
  • MDDS Content IDs 697426

Stratix® V 5SGSD3 FPGA 5SGSMD3E3H29I4N

  • MM# 969572
  • Spec Code SR80N
  • Ordering Code 5SGSMD3E3H29I4N
  • Stepping A1
  • MDDS Content IDs 695544

Stratix® V 5SGSD3 FPGA 5SGSMD3H2F35I2N

  • MM# 969574
  • Spec Code SR80Q
  • Ordering Code 5SGSMD3H2F35I2N
  • Stepping A1
  • MDDS Content IDs 744855, 694700

Stratix® V 5SGSD3 FPGA 5SGSMD3H3F35C3N

  • MM# 969575
  • Spec Code SR80R
  • Ordering Code 5SGSMD3H3F35C3N
  • Stepping A1
  • MDDS Content IDs 701705

Stratix® V 5SGSD3 FPGA 5SGSMD3E1H29C2L

  • MM# 969784
  • Spec Code SR86W
  • Ordering Code 5SGSMD3E1H29C2L
  • Stepping A1
  • MDDS Content IDs 697033

Stratix® V 5SGSD3 FPGA 5SGSMD3H1F35C2N

  • MM# 969787
  • Spec Code SR86Z
  • Ordering Code 5SGSMD3H1F35C2N
  • Stepping A1
  • MDDS Content IDs 700675

Stratix® V 5SGSD3 FPGA 5SGSMD3H3F35C2N

  • MM# 969789
  • Spec Code SR871
  • Ordering Code 5SGSMD3H3F35C2N
  • Stepping A1
  • MDDS Content IDs 700605

Stratix® V 5SGSD3 FPGA 5SGSMD3E2H29C2L

  • MM# 970675
  • Spec Code SR8WN
  • Ordering Code 5SGSMD3E2H29C2L
  • Stepping A1
  • MDDS Content IDs 694268

Stratix® V 5SGSD3 FPGA 5SGSMD3E2H29I3LN

  • MM# 970678
  • Spec Code SR8WR
  • Ordering Code 5SGSMD3E2H29I3LN
  • Stepping A1
  • MDDS Content IDs 695228

Stratix® V 5SGSD3 FPGA 5SGSMD3E3H29C2L

  • MM# 970679
  • Spec Code SR8WS
  • Ordering Code 5SGSMD3E3H29C2L
  • Stepping A1
  • MDDS Content IDs 693409

Stratix® V 5SGSD3 FPGA 5SGSMD3E3H29C2LN

  • MM# 970680
  • Spec Code SR8WT
  • Ordering Code 5SGSMD3E3H29C2LN
  • Stepping A1
  • MDDS Content IDs 697296

Stratix® V 5SGSD3 FPGA 5SGSMD3H1F35I2N

  • MM# 970682
  • Spec Code SR8WV
  • Ordering Code 5SGSMD3H1F35I2N
  • Stepping A1
  • MDDS Content IDs 702516

Stratix® V 5SGSD3 FPGA 5SGSMD3H2F35C3N

  • MM# 970683
  • Spec Code SR8WW
  • Ordering Code 5SGSMD3H2F35C3N
  • Stepping A1
  • MDDS Content IDs 699854

Stratix® V 5SGSD3 FPGA 5SGSMD3H3F35C4N

  • MM# 970684
  • Spec Code SR8WX
  • Ordering Code 5SGSMD3H3F35C4N
  • Stepping A1
  • MDDS Content IDs 698507

Trade compliance information

  • ECCN 3A991
  • CCATS NA
  • US HTS 8542390001

PCN Information

SRHF2

SRHF1

SRHF0

SRHEL

SRHEZ

SRHEY

SRHF7

SRHEK

SRHEJ

SRHEH

SRHEG

SRHEF

SRHEE

SR80N

SRHE3

SRHE2

SR80L

SRHE1

SR80J

SR80H

SR80G

SR80R

SR80Q

SR80F

SRHG5

SR8WT

SRHG4

SR8WS

SRHG3

SR8WR

SR871

SR8WN

SR86Z

SRHFX

SR86W

SR8WX

SRHFW

SRHG8

SR8WW

SRHFV

SRHG7

SR8WV

SRHFU

SRHG6

SRHFD

SRHFB

SRHFJ

SRHFH

SRHFF

SRHFE

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Launch Date

The date the product was first introduced.

Lithography

Lithography refers to the semiconductor technology used to manufacture an integrated circuit, and is reported in nanometer (nm), indicative of the size of features built on the semiconductor.

Logic Elements (LE)

Logic elements (LEs) are the smallest units of logic in Intel® FPGA architecture. LEs are compact and provide advanced features with efficient logic usage.

Adaptive Logic Modules (ALM)

The adaptive logic module (ALM) is the logic building block in supported Intel FPGA devices, and is designed to maximize both performance and utilization. Each ALM has several different modes of operation, and can implement a variety of different combinatorial and sequential logical functions.

Adaptive Logic Module (ALM) Registers

ALM registers are those register bits (flip-flops) that are contained inside the ALMs and are used to implement sequential logic.

Fabric and I/O Phase-Locked Loops (PLLs)

Fabric and IO PLLs are used to simplify the design and implementation of the clock networks in the Intel FPGA fabric, and also the clock networks associated with the IO cells in the device.

Maximum Embedded Memory

The total capacity of all the embedded memory blocks in the programmable fabric of the Intel FPGA device.

Digital Signal Processing (DSP) Blocks

The digital signal processing (DSP) block is the mathematical building block in supported Intel FPGA devices and contains high-performance multipliers and accumulators to implement a variety of digital signal processing functions.

Digital Signal Processing (DSP) Format

Depending on the Intel FPGA device family, the DSP block supports different formats such as hard floating point, hard fixed point, multiply and accumulate, and multiply only.

Hard Memory Controllers

Hard memory controllers are used to enable high-performance external memory systems attached to the Intel FPGA. A hard memory controller saves power and FPGA resources compared to the equivalent soft memory controller, and supports higher frequency operation.

External Memory Interfaces (EMIF)

The external memory interface protocols supported by the Intel FPGA device.

Maximum User I/O Count†

The maximum number of general purpose I/O pins in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.

I/O Standards Support

The general purpose I/O interface standards supported by the Intel FPGA device.

Maximum LVDS Pairs

The maximum number of LVDS pairs that can be configured in the Intel FPGA device, in the largest available package. Refer to device documentation for actual RX and TX LVDS pairs count by package type.

Maximum Non-Return to Zero (NRZ) Transceivers†

The maximum number of NRZ transceivers in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.

Maximum Non-Return to Zero (NRZ) Data Rate†

The maximum NRZ data rate that is supported by the NRZ transceivers.
† Actual data rate could be lower depending on transceiver speed grade.

Transceiver Protocol Hard IP

Hard intellectual property available in the Intel FPGA device to support the high-speed serial transceivers. Transceiver protocol hard IP saves power and FPGA resources compared to the equivalent soft IP, and simplifies the implementation of the serial protocol.

Package Options

Intel FPGA devices are available in different package sizes, with different IO and transceiver counts, to match customer system requirements.

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All information provided is subject to change at any time, without notice. Intel may make changes to manufacturing life cycle, specifications, and product descriptions at any time, without notice. The information herein is provided "as-is" and Intel does not make any representations or warranties whatsoever regarding accuracy of the information, nor on the product features, availability, functionality, or compatibility of the products listed. Please contact system vendor for more information on specific products or systems.

Intel classifications are for general, educational and planning purposes only and consist of Export Control Classification Numbers (ECCN) and Harmonized Tariff Schedule (HTS) numbers. Any use made of Intel classifications are without recourse to Intel and shall not be construed as a representation or warranty regarding the proper ECCN or HTS. Your company as an importer and/or exporter is responsible for determining the correct classification of your transaction.

Refer to Datasheet for formal definitions of product properties and features.

‡ This feature may not be available on all computing systems. Please check with the system vendor to determine if your system delivers this feature, or reference the system specifications (motherboard, processor, chipset, power supply, HDD, graphics controller, memory, BIOS, drivers, virtual machine monitor-VMM, platform software, and/or operating system) for feature compatibility. Functionality, performance, and other benefits of this feature may vary depending on system configuration.

“Announced” SKUs are not yet available. Please refer to the Launch Date for market availability.